AMC7812B_15 Datasheet, PDF (43/92 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812B
www.ti.com
SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013
Clear DACs
DAC-n can be cleared with hardware or software, as shown in Figure 93. When DAC-n goes to a clear state, it is
immediately loaded with predefined code in the DAC-n-CLR-setting register, and the output is set to the
corresponding level to shut down the external LDMOS device. However, the DAC-n-data register does not
change. When the DAC goes back to normal operation, DAC-n is immediately loaded with the previous data from
the DAC-n-data register and the output of DACn-OUT is set back to the previous level to restore LDMOS to the
status before shutdown, regardless of the SLDAC-n bit status.
DAC
Data Register
DAC
CLR-Setting
Register
DAC
Latch
0
DAC
1
DAC-CLR-n Pin
CLR-n Bit in HW-DAC-CLR-n Register
CLR-n Bit in SW-DAC-CLR-n Register
ACLR-n Bit
Alarm Source
Figure 93. Clearing DAC-n
The device is implemented with two external control lines, the DAC-CLR-0 and DAC-CLR-1 pins, to clear the
DACs. When either pin goes low, the corresponding user-selected DACs are in a cleared state. The HW_DAC-
CLR-0 register determines which DAC is cleared when the DAC-CLR-0 pin is low. The register contains 12 clear
bits (CLR-n), one per DAC. If the CLR-n bit is '1', DAC-n is in a cleared state when the DAC-CLR-0 pin is low.
However, if the CLR-n bit is '0', DAC-n does not change when the pin is low. Likewise, the HW-DAC-CLR-1
register determines which DAC is cleared when the DAC-CLR-1 pin is low.
Writing directly to the SW_DAC_CLR register puts the selected DACs in a cleared state. DACs can also be
forced into a clear state by alarm events. The AUTO-DAC-CLR-SOURCE register specifies which alarm events
force the DACs into a clear state, and the AUTO-DAC-CLR-EN register defines which DACs are forced into a
clear state. Refer to the AUTO-DAC-CLR-SOURCE register and AUTO-DAC-CLR-EN register for further details.
DAC Output Thermal Protection
A significant amount of power can be dissipated in the DAC outputs. The AMC7812B is implemented with a
thermal protection circuit that sets the THERM-ALR bit in the status register if the die temperature exceeds
+150°C. The THERM-ALR bit can be used in combination with THERM-ALR-CLR (bit 2 in the AUTO-DAC-CLR-
SOURCE register) and ACLR-n (bits[14:3] in the AUTO-DAC-CLR-EN register) to set the DAC output to a
predefined code when this condition occurs. Note that this feature is disabled when the local temperature sensor
powers down.
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