OMAP-L137 Datasheet, PDF (64/219 Pages) Texas Instruments – Low-Power Applications Processor

OMAP-L137 Low-Power Applications Processor
SPRS563A – SEPTEMBER 2008 – REVISED OCTOBER 2008
www.ti.com
4.4 Chip Configuration Registers (CFGCHIP and SUSPSRC)
These registers control EDMA3 default transfer burst sizes, clock muxing, McASP AMUTE and eCAP
sources, UHPI enable and configuration, and USB PHY settings
4.4.1 CFGCHIP0
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
R-n/a
15 14 13 12 11 10
9
Reserved
R-n/a
LEGEND: R = Read, W = Write, n = value at reset
8
7
6
5
4
3
2
Reserved
PLLMASTERLOCK TC1DBS
R/W-1
R/W-000
R/W-0
R/W-00
Figure 4-24. CFGCHIP0 Register Bit Layout
1
0
TC0DBS
R/W-00
Bit
Field
31:5 Reserved
4
PLL_MASTER_LOCK
3:2
TC1DBS
1:0
TC0DBS
Table 4-25. CFGCHIP0 Field Description
Description
Reserved
This bit is used to lock the PLL MMRs
0 = PLLCTRL MMR registers are freely accessible.
1 = PLLCTRL MMR registers are locked.
EDMA3 TC1 Default Burst Size
00 = 16 byte
01 = 32 byte
10 = 64 byte
11 = Reserved
EDMA3 TC1 Default Burst Size
00 = 16 byte
01 = 32 byte
10 = 64 byte
11 = Reserved
64
Device Configuration
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