OMAP-L137 Datasheet, PDF (165/219 Pages) Texas Instruments – Low-Power Applications Processor

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OMAP-L137 Low-Power Applications Processor
SPRS563A – SEPTEMBER 2008 – REVISED OCTOBER 2008
SYNCIn
SYNCOut
CTRPHS
(phase register−32 bit)
TSCTR
OVF
(counter−32 bit)
RST
CTR_OVF
Delta−mode
32
32
CTR [0−31]
PRD [0−31]
APWM mode
CTR [0−31]
PRD [0−31]
CMP [0−31]
PWM
compare
logic
CTR=PRD
CTR=CMP
32
CAP1
(APRD active)
LD
LD1
APRD
shadow32
32
CMP [0−31]
32
CAP2
(ACMP active)
LD
LD2
32 ACMP
shadow
Event
qualifier
32
CAP3
(APRD shadow)
LD
LD3
Polarity
select
Polarity
select
Polarity
select
Event
Pre-scale
eCAPx
32
to PIE
CAP4
(ACMP shadow)
LD
LD4
4
Capture events
CEVT[1:4]
Interrupt
Trigger
and
Flag
control
CTR_OVF
CTR=PRD
CTR=CMP
Polarity
select
4
Continuous /
Oneshot
Capture Control
Figure 6-41. eCAP Functional Block Diagram
Table 6-65 is the list of the ECAP registers.
ECAP0
BYTE ADDRESS
0x01F0 6000
0x01F0 6004
0x01F0 6008
Table 6-65. ECAPx Configuration Registers
ECAP1
BYTE ADDRESS
0x01F0 7000
0x01F0 7004
0x01F0 7008
ECAP2
BYTE ADDRESS
0x01F0 8000
0x01F0 8004
0x01F0 8008
REGISTER NAME
DESCRIPTION
TSCTR
CTRPHS
CAP1
Time-Stamp Counter
Counter Phase Offset Value Register
Capture 1 Register
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Peripheral Information and Electrical Specifications 165