OMAP-L137 Datasheet, PDF (204/219 Pages) Texas Instruments – Low-Power Applications Processor

OMAP-L137 Low-Power Applications Processor
SPRS563A – SEPTEMBER 2008 – REVISED OCTOBER 2008
www.ti.com
USB_DM
V_CRS
USB_DP
10% V_OL
t_{per −} t_jr
90% V_OH
t_r
t_f
Figure 6-65. USB2.0 Integrated Transceiver Interface Timing
6.32 Power and Sleep Controller (PSC)
The Power and Sleep Controllers (PSC) are responsible for managing transitions of system power on/off,
clock on/off, resets (device level and module level). It is used primarily to provide granular power control
for on chip modules (peripherals and CPU). A PSC module consists of a Global PSC (GPSC) and a set of
Local PSCs (LPSCs). The GPSC contains memory mapped registers, PSC interrupts, a state machine for
each peripheral/module it controls. An LPSC is associated with every module that is controlled by the PSC
and provides clock and reset control.
The PSC includes the following features:
• Provides a software interface to:
– Control module clock enable/disable
– Control module reset
– Control CPU local reset
• Supports IcePick emulation features: power, clock and reset
PSC0
0x01C1 0000
0x01C1 0018
0x01C1 0040
0x01C1 0050
0x01C1 0060
0x01C1 0068
0x01C1 0120
0x01C1 0128
0x01C1 0200
0x01C1 0204
0x01C1 0300
0x01C1 0304
0x01C1 0400
0x01C1 0404
0x01C1 0800 - 0x01C1
083C
0x01C1 0A00 - 0x01C1
0A3C
Table 6-100. Power and Sleep Controller (PSC) Registers
PSC1
0x01E2 7000
0x01E2 7018
0x01E2 7040
Register
REVID
INTEVAL
MERRPR0
0x01E2 7050
MERRCR0
0x01E2 7060
0x01E2 7068
0x01E2 7120
0x01E2 7128
0x01E2 7200
0x01E2 7204
0x01E2 7300
0x01E2 7304
0x01E2 7400
0x01E2 7404
0x01E2 7800 -
0x01E2 787C
0x01E2 7A00 -
0x01E2 7A7C
PERRPR
PERRCR
PTCMD
PTSTAT
PDSTAT0
PDSTAT1
PDCTL0
PDCTL1
PDCFG0
PDCFG1
MDSTAT0-
MDSTAT15
MDSTAT0-
MDSTAT31
MDCTL0-
MDCTL15
MDSTAT0-
MDSTAT31
Description
Peripheral Revision and Class Information Register
Interrupt Evaluation Register
Module Error Pending Register 0 (module 0-15) (PSC0)
Module Error Pending Register 0 (module 0-31) (PSC1)
Module Error Clear Register 0 (module 0-15) (PSC0)
Module Error Clear Register 0 (module 0-31) (PSC1)
Power Error Pending Register
Power Error Clear Register
Power Domain Transition Command Register
Power Domain Transition Status Register
Power Domain 0 Status Register
Power Domain 1 Status Register
Power Domain 0 Control Register
Power Domain 1 Control Register
Power Domain 0 Configuration Register
Power Domain 1 Configuration Register
Module Status n Register (modules 0-15) (PSC0)
Module Status n Register (modules 0-31) (PSC1)
Module Control n Register (modules 0-15) (PSC0)
Module Status n Register (modules 0-31) (PSC1)
204 Peripheral Information and Electrical Specifications
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