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OMAP-L137 Datasheet, PDF (6/219 Pages) Texas Instruments – Low-Power Applications Processor
OMAP-L137 Low-Power Applications Processor
SPRS563A – SEPTEMBER 2008 – REVISED OCTOBER 2008
www.ti.com
Contents
1 OMAP-L137 Low-Power Applications Processor . 1
1.1 Features .............................................. 1
1.2 Trademarks ........................................... 3
1.3 Description............................................ 4
1.4 Functional Block Diagram ............................ 5
2 Revision History ......................................... 7
3 Device Overview ......................................... 8
3.1 Device Characteristics................................ 8
3.2 Device Compatibility .................................. 9
3.3 ARM Subsystem...................................... 9
3.4 DSP Subsystem..................................... 12
3.5 Memory Map Summary ............................. 18
3.6 Pin Assignments .................................... 21
3.7 Terminal Functions .................................. 22
4 Device Configuration .................................. 38
4.1 SYSCFG Module .................................... 38
4.2 Pin Multiplexing Control Registers .................. 39
4.3 Bus Master Priority Configuration ................... 60
4.4 Chip Configuration Registers (CFGCHIP and
SUSPSRC) .......................................... 64
4.5 ARM/DSP Communication Registers ............... 71
4.6 Device Support ...................................... 72
4.7 Documentation Support ............................. 73
5 Device Operating Conditions ........................ 75
5.1 Absolute Maximum Ratings Over Operating Case
Temperature Range
(Unless Otherwise Noted) .......................... 75
5.2 Recommended Operating Conditions............... 76
5.3 Electrical Characteristics Over Recommended
Ranges of Supply Voltage and Operating Case
Temperature (Unless Otherwise Noted) ............ 77
6 Peripheral Information and Electrical
Specifications ........................................... 78
6.1 Parameter Information .............................. 78
6.2 Recommended Clock and Control Signal Transition
Behavior ............................................. 79
6.3 Power Supplies...................................... 80
6.4 Reset ................................................ 80
6.5 Crystal Oscillator or External Clock Input ........... 81
6.6 Clock PLLs .......................................... 82
6.7 Interrupts ............................................ 85
6.8 General-Purpose Input/Output (GPIO) .............. 96
6.9 EDMA ............................................... 99
6.10 External Memory Interface A (EMIFA) ............. 104
6.11 EMIFB Peripheral Registers Description(s)........ 114
6.12 MMC / SD / SDIO (MMCSD)....................... 119
6.13 Ethernet Media Access Controller (EMAC) ........ 122
6.14 Management Data Input/Output (MDIO)........... 128
6.15 Multichannel Audio Serial Ports (McASP0, McASP1,
and McASP2) ...................................... 130
6.16 Serial Peripheral Interface Ports (SPI0, SPI1)..... 146
6.17 ECAP Peripheral Registers Description(s) ........ 164
6.18 EQEP Peripheral Registers Description(s) ........ 167
6.19 eHRPWM .......................................... 169
6.22 LCD Controller ..................................... 173
6.23 Timers.............................................. 188
6.24 Inter-Integrated Circuit Serial Ports (I2C0, I2C1) .. 190
6.25 Universal Asynchronous Receiver/Transmitter
(UART) ............................................. 194
6.26 USB1 Host Controller Registers (USB1.1 OHCI) .. 196
6.27 USB0 OTG (USB2.0 OTG) ........................ 197
6.32 Power and Sleep Controller (PSC) ................ 204
6.34 Emulation Logic .................................... 207
6.35 Real Time Clock (RTC) ............................ 213
7 Mechanical Packaging and Orderable
Information ............................................. 216
7.1 Thermal Data for ZKB.............................. 216
7.2 Mechanical Drawings .............................. 216
6
Contents
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