AM1808_11 Datasheet, PDF (64/262 Pages) Texas Instruments – AM1808 ARM Microprocessor

AM1808
SPRS653C – FEBRUARY 2010 – REVISED DECEMBER 2011
www.ti.com
4.2 Recommended Operating Conditions
Supply
Voltage
NAME
CVDD
RVDD
RTC_CVDD ⁽¹⁾
PLL0_VDDA
PLL1_VDDA
SATA_VDD
USB_CVDD
USB0_VDDA18
USB0_VDDA33
USB1_VDDA18
USB1_VDDA33
DVDD18 ⁽²⁾
SATA_VDDR
DDR_DVDD18
(2)
DESCRIPTION
CONDITION
Core Logic Supply Voltage (variable) 1.3V operating point
1.2V operating point
1.1V operating point
1.0V operating point
Internal RAM Supply Voltage
456 MHz versions
375 MHz versions
RTC Core Logic Supply Voltage
PLL0 Supply Voltage
PLL1 Supply Voltage
SATA Core Logic Supply Voltage
USB0, USB1 Core Logic Supply Voltage
USB0 PHY Supply Voltage
USB0 PHY Supply Voltage
USB1 PHY Supply Voltage
USB1 PHY Supply Voltage
1.8V Logic Supply
SATA PHY Internal Regulator Supply Voltage
DDR2 PHY Supply Voltage
Supply
Ground
Voltage
Input High
Voltage
Input Low
DDR_VREF
DDR2/mDDR reference voltage
DDR_ZP
DVDD3318_A
DVDD3318_B
DVDD3318_C
VSS
PLL0_VSSA
PLL1_VSSA
SATA_VSS
OSCVSS ⁽³⁾
RTC_VSS ⁽³⁾
USB0_VSSA
USB0_VSSA33
V_IH
V_IL
DDR2/mDDR impedance control,
connected via 50Ω resistor to Vss
Power Group A Dual-voltage IO
Supply Voltage
Power Group B Dual-voltage IO
Supply Voltage
Power Group C Dual-voltage IO
Supply Voltage
1.8V operating point
3.3V operating point
1.8V operating point
3.3V operating point
1.8V operating point
3.3V operating point
Core Logic Digital Ground
PLL0 Ground
PLL1 Ground
SATA PHY Ground
Oscillator Ground
RTC Oscillator Ground
USB0 PHY Ground
USB0 PHY Ground
High-level input voltage, Dual-voltage I/O, 3.3V⁽⁴⁾
High-level input voltage, Dual-voltage I/O, 1.8V ⁽⁴⁾
High-level input voltage, RTC_XI
High-level input voltage, OSCIN
Low-level input voltage, Dual-voltage I/O, 3.3V⁽⁴⁾
Low-level input voltage, Dual-voltage I/O, 1.8V ⁽⁴⁾
MIN
NOM
1.25
1.3
1.14
1.2
1.05
1.1
0.95
1.0
1.25
1.3
1.14
1.2
0.9
1.2
1.14
1.2
1.14
1.2
1.14
1.2
1.14
1.2
1.71
1.8
3.15
3.3
1.71
1.8
3.15
3.3
1.71
1.8
1.71
1.8
1.71
1.8
0.49*
DDR_DVDD18
0.5*
DDR_DVDD1
8
Vss
1.71
1.8
3.15
3.3
1.71
1.8
3.15
3.3
1.71
1.8
3.15
3.3
0
0
2
0.65*DVDD
0.8*RTC_CVDD
0.8*CVDD
MAX
1.35
1.32
1.16
1.05
1.35
1.32
1.32
1.32
1.32
1.32
1.32
1.89
3.45
1.89
3.45
1.89
1.89
1.89
0.51*
DDR_DVDD18
1.89
3.45
1.89
3.45
1.89
3.45
0
0.8
0.35*DVDD
UNIT
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
(1) The RTC provides an option for isolating the RTC_CVDD from the CVDD to reduce current leakage when the RTC is powered
independently. If these power supplies are not isolated (CTRL.SPLITPOWER=0), RTC_CVDD must be equal to or greater than CVDD.
If these power supplies are isolated (CTRL.SPLITPOWER=1), RTC_CVDD may be lower than CVDD.
(2) DVDD18 must be powered even if all of the DVDD3318_x supplies are operated at 3.3V
(3) When an external crystal is used oscillator (OSC_VSS, RTC_VSS) ground must be kept separate from other grounds and connected
directly to the crystal load capacitor ground. These pins are shorted to VSS on the device itself and should not be connected to VSS on
the circuit board. If a crystal is not used and the clock input is driven directly, then the oscillator VSS may be connected to board ground.
(4) These IO specifications apply to the dual-voltage IOs only and do not apply to the DDR2/mDDR or SATA interfaces. DDR2/mDDR IOs
are 1.8V IOs and adhere to the JESD79-2A standard.
64
Device Operating Conditions
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