TMS320C6455_15 Datasheet, PDF (60/257 Pages) Texas Instruments – TMS320C6455 Fixed-Point Digital Signal Processor

TMS320C6455
SPRS276M – MAY 2005 – REVISED MARCH 2012
www.ti.com
Figure 3-2 shows the flow needed to change the state of a given peripheral on the C6455 device.
Unlock the PERCFG0 register by
using the PERLOCK register.
Write to the PERCFG0 register
within 16 SYSCLK3 clock cycles
to change the state of the
peripherals.
Poll the PERSTAT registers to
verify state change.
Figure 3-2. Peripheral State Change Flow
A 32-bit key (value = 0x0F0A 0B00) must be written to the Peripheral Lock register (PERLOCK) in order to
allow access to the PERCFG0 register. Writes to the PERCFG1 register can be done directly without
going through the PERLOCK register.
NOTE
The instructions that write to the PERLOCK and PERCFG0 registers must be in the same
fetch packet if code is being executed from external memory. If the instructions are in
different fetch packets, fetching the second instruction from external memory may stall the
instruction long enough such that PERCFG0 register will be locked before the instruction is
executed.
3.4 Device State Control Registers
The C6455 device has a set of registers that are used to control the status of its peripherals. These
registers are shown in Table 3-5 and described in the next sections.
NOTE
The device state control registers can only be accessed using the CPU or the emulator.
Table 3-5. Device State Control Registers
HEX ADDRESS RANGE
02AC 0000
02AC 0004
02AC 0008
02AC 000C
02AC 0010
02AC 0014
02AC 0018
02AC 001C - 02AC 001F
02AC 0020
ACRONYM
-
PERLOCK
PERCFG0
-
-
PERSTAT0
PERSTAT1
-
EMACCFG
REGISTER NAME
Reserved
Peripheral Lock Register
Peripheral Configuration Register 0
Reserved
Reserved
Peripheral Status Register 0
Peripheral Status Register 1
Reserved
EMAC Configuration Register
60
Device Configuration
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