TMS320C6455_15 Datasheet, PDF (195/257 Pages) Texas Instruments – TMS320C6455 Fixed-Point Digital Signal Processor

TMS320C6455
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SPRS276M – MAY 2005 – REVISED MARCH 2012
Table 7-66. Timing Requirements for McBSP as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1^{(1) (2)}
(see Figure 7-56)
-720
-850
A-1000/-1000
NO.
-1200
UNIT
MASTER
SLAVE
MIN
MAX
MIN
MAX
4
t_su(DRV-CKXH)
5
t_h(CKXH-DRV)
Setup time, DR valid before CLKX high
Hold time, DR valid after CLKX high
12
2 - 18P
ns
4
5 + 36P
ns
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 1000 MHz, use P = 1 ns.
(2) For all SPI Slave modes, CLKG is programmed as 1/6 of the CPU clock by setting CLKSM = CLKGDV = 1.
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C64x+ Peripheral Information and Electrical Specifications 195
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