TMS320C6455_15 Datasheet, PDF (206/257 Pages) Texas Instruments – TMS320C6455 Fixed-Point Digital Signal Processor

TMS320C6455
SPRS276M – MAY 2005 – REVISED MARCH 2012
www.ti.com
HEX ADDRESS RANGE
02C8 0230
02C8 0234
02C8 0238
02C8 023C
02C8 0240
02C8 0244
02C8 0248
02C8 024C
02C8 0250
02C8 0254
02C8 0258
02C8 025C
02C8 0260
02C8 0264
02C8 0268
02C8 026C
02C8 0270
02C8 0274
02C8 0278
02C8 027C
02C8 0280
02C8 0284
02C8 0288
02C8 028C
02C8 0290 - 02C8 02FC
Table 7-72. EMAC Statistics Registers (continued)
ACRONYM
RXOCTETS
TXGOODFRAMES
TXBCASTFRAMES
TXMCASTFRAMES
TXPAUSEFRAMES
TXDEFERRED
TXCOLLISION
TXSINGLECOLL
TXMULTICOLL
TXEXCESSIVECOLL
TXLATECOLL
TXUNDERRUN
TXCARRIERSENSE
TXOCTETS
FRAME64
FRAME65T127
FRAME128T255
FRAME256T511
FRAME512T1023
FRAME1024TUP
NETOCTETS
RXSOFOVERRUNS
RXMOFOVERRUNS
RXDMAOVERRUNS
-
REGISTER NAME
Receive Octet Frames Register
(Total number of received bytes in good frames)
Good Transmit Frames Register
(Total number of good frames transmitted)
Broadcast Transmit Frames Register
Multicast Transmit Frames Register
Pause Transmit Frames Register
Deferred Transmit Frames Register
Transmit Collision Frames Register
Transmit Single Collision Frames Register
Transmit Multiple Collision Frames Register
Transmit Excessive Collision Frames Register
Transmit Late Collision Frames Register
Transmit Underrun Error Register
Transmit Carrier Sense Errors Register
Transmit Octet Frames Register
Transmit and Receive 64 Octet Frames Register
Transmit and Receive 65 to 127 Octet Frames Register
Transmit and Receive 128 to 255 Octet Frames Register
Transmit and Receive 256 to 511 Octet Frames Register
Transmit and Receive 512 to 1023 Octet Frames Register
Transmit and Receive 1024 to 1518 Octet Frames Register
Network Octet Frames Register
Receive FIFO or DMA Start of Frame Overruns Register
Receive FIFO or DMA Middle of Frame Overruns Register
Receive DMA Start of Frame and Middle of Frame Overruns
Register
Reserved
HEX ADDRESS RANGE
02C8 1000
02C8 1004
02C8 1008
02C8 100C - 02C8 17FF
Table 7-73. EMAC Control Module Registers
ACRONYM
-
EWCTL
EWINTTCNT
-
REGISTER NAME
Reserved
EMAC Control Module Interrupt Control Register
EMAC Control Module Interrupt Timer Count Register
Reserved
HEX ADDRESS RANGE
02C8 2000 - 02C8 3FFF
Table 7-74. EMAC Descriptor Memory
ACRONYM
-
EMAC Descriptor Memory
DESCRIPTION
206 C64x+ Peripheral Information and Electrical Specifications
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