TMS320C6455_15 Datasheet, PDF (205/257 Pages) Texas Instruments – TMS320C6455 Fixed-Point Digital Signal Processor

TMS320C6455
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SPRS276M – MAY 2005 – REVISED MARCH 2012
Table 7-71. Ethernet MAC (EMAC) Control Registers (continued)
HEX ADDRESS RANGE
02C8 064C
02C8 0650
02C8 0654
02C8 0658
02C8 065C
02C8 0660
02C8 0664
02C8 0668
02C8 066C
02C8 0670
02C8 0674
02C8 0678
02C8 067C
02C8 0680 - 02C8 06FC
02C8 0700 - 02C8 077C
02C8 0780 - 02C8 0FFF
ACRONYM
TX3CP
TX4CP
TX5CP
TX6CP
TX7CP
RX0CP
RX1CP
RX2CP
RX3CP
RX4CP
RX5CP
RX6CP
RX7CP
-
-
-
REGISTER NAME
Transmit Channel 3 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 4 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 5 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 6 Completion Pointer (Interrupt Acknowledge)
Register
Transmit Channel 7 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 0 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 1 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 2 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 3 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 4 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 5 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 6 Completion Pointer (Interrupt Acknowledge)
Register
Receive Channel 7 Completion Pointer (Interrupt Acknowledge)
Register
Reserved
Reserved
was State RAM Test Access Registers
Processor Read and Write Access to Head Descriptor Pointers and
Interrupt Acknowledge Registers
Reserved
HEX ADDRESS RANGE
02C8 0200
02C8 0204
02C8 0208
02C8 020C
02C8 0210
02C8 0214
02C8 0218
02C8 021C
02C8 0220
02C8 0224
02C8 0228
02C8 022C
Table 7-72. EMAC Statistics Registers
ACRONYM
RXGOODFRAMES
RXBCASTFRAMES
RXMCASTFRAMES
RXPAUSEFRAMES
RXCRCERRORS
RXALIGNCODEERRORS
RXOVERSIZED
RXJABBER
RXUNDERSIZED
RXFRAGMENTS
RXFILTERED
RXQOSFILTERED
REGISTER NAME
Good Receive Frames Register
Broadcast Receive Frames Register
(Total number of good broadcast frames received)
Multicast Receive Frames Register
(Total number of good multicast frames received)
Pause Receive Frames Register
Receive CRC Errors Register (Total number of frames received with
CRC errors)
Receive Alignment/Code Errors Register
(Total number of frames received with alignment/code errors)
Receive Oversized Frames Register
(Total number of oversized frames received)
Receive Jabber Frames Register
(Total number of jabber frames received)
Receive Undersized Frames Register
(Total number of undersized frames received)
Receive Frame Fragments Register
Filtered Receive Frames Register
Received QOS Filtered Frames Register
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C64x+ Peripheral Information and Electrical Specifications 205
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