TLK4015 Datasheet, PDF (6/24 Pages) Texas Instruments – QUAD 0.6 TO 1.5 Gbps TRANSCEIVER

TLK4015
QUAD 0.6 to 1.5 Gbps TRANSCEIVER
SLLS541 – DECEMBER 2002
Terminal Functions (Continued)
NAME
LOOPENA
LOOPENB
LOOPENC
LOOPEND
TERMINAL
NUMBER
H4
D10
P12
M4
PRBSENA
G5
PRBSENB
E11
PRBSENC
N9
PRBSEND
L4
RA_CLK
D4
RB_CLK
D14
RC_CLK
U13
RD_CLK
N1
RA_DV/LOSA
F5
RB_DV/LOSB
E12
RC_DV/LOSC
R9
RD_DV/LOSD
J3
RA_ER/PRBS_PASSA E4
RB_ER/PRBS_PASSB D13
RC_ER/PRBS_PASSC P10
RD_ER/PRBS_PASSD K4
RDA[0–15]
RDB[0–15]
RDC[0–15]
RDD[0–15]
† _{Hi-Z on power up}
‡ _{Internal 10 kΩ pullup}
§ _{Internal 10 kΩ pulldown}
¶ _{Low on power up}
A8, B8, C6, C4,
D6, D7, D8, D5,
E8, E7, E6, F8,
F7, E5, F6, G6
H17, H16, F15, D15,
F14, G14, H14, E14,
H13, G13, F13, H12,
G12, E13, F12, F11
T17, U17, T16, T15,
U16, U15, T14, U14,
T13, U12, T12, U11,
U10, T11, R10, T9
U2, U1, T2, R2, T1,
R1, P2, P1, N2, M1,
M2, L1, K1, L2, K2,
K3
TYPE
DESCRIPTION
I^§ Loop enable (with pulldown), channels A–D. When LOOPENx is active high, the
internal loopback path is activated. The transmitted serial data is directly routed
internally to the inputs of the receiver. This provides a self-test capability in
conjunction with the protocol device. The DOUTTxP and DOUTTxN outputs are
held in a high-impedance state during the loopback test. LOOPENx is held low
during standard operational state with external serial outputs and inputs active.
I^§ PRBS test enable (with pulldown), channels A–D. When asserted high, results of
pseudorandom bit stream (PRBS) tests can be monitored on the
Rx_ER/PRBS_PASSx terminal. A high on PRBS_PASSx indicates that valid PRBS
is being received.
O^¶ Recovered clock (low on power up), channels A–D. Output clock that is
synchronized to RDx, Rx_ER, Rx_DV/LOSx. Rx_CLK is the recovered serial data
rate clock divided by 20. Rx_CLK is held low during power-on reset.
O^† Receive data valid (Hi-Z on power up), channels A–D. Rx_DV/LOSx is output by
the transceiver to indicate that recovered and decoded data is being output on the
receive data bus. Rx_DV/LOSx is asserted high continuously from the first
recovered word of the frame through the final recovered word and is negated prior
to the first rising edge of Rx_CLK that follows the final word. Rx_DV/LOSx is in the
high-impedance state during power-on reset.
If, during normal operation, the differential signal amplitude on the serial receive
terminals is below 200 mV, Rx_DV/LOSx is asserted high along with Rx_ER and
the receive data bus to indicate a loss of signal condition. If the device is in
power-down mode, Rx_DV/LOSx is the output of the signal-detect circuit and is
asserted low when a loss-of-signal condition is detected.
O^† Receive error (Hi-Z on power up), channels A–D. When Rx_ER and Rx_DV/LOSx
are asserted high, indicates that an error was detected somewhere in the frame
presently being output on the receive data bus. When Rx_ER is asserted high and
Rx_DV/LOSx is deasserted low, indicates that carrier extension data is being
presented. Rx_ER is in the high-impedance state during power-on reset.
When PRBSENx = low (deasserted), this terminal is used to indicate receive error
(Rx_ER).
When PRBSENx = high (asserted), this terminal indicates status of the PRBS test
results (high = pass).
O^† Receive data bus (Hi–Z on power up), channels A–D. These outputs carry 16-bit
parallel data output from the transceiver to the protocol device, synchronized to
Rx_CLK. The data is valid on the rising edge of Rx_CLK as shown in Figure 10.
These terminals are in a high-impedance state during power-on reset.
O^†
O^†
O^†
6
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265