TLK4015 Datasheet, PDF (14/24 Pages) Texas Instruments – QUAD 0.6 TO 1.5 Gbps TRANSCEIVER

TLK4015
QUAD 0.6 to 1.5 Gbps TRANSCEIVER
SLLS541 – DECEMBER 2002
detailed description (continued)
DINRxP,
DINRxN
IDLE
ACQ
Valid Data or
Error Prop
D0–D15
SYNC
D0–D15
RDx[0–15]
Rx_ER
ÎÎÎÎÎÎÎÎÎÎÎÎ ^{XXXXXXXXXXXXXXXXXXX}
Valid Data or
Error Prop
D0–D15
D0–D15
Rx_DV
RESET
(Internal Signal)
Figure 8. Receive-Side Timing Diagram (Valid Data or Error Propagation)
redundant port operation
The TLK4015 allows users to design a redundant port by connecting receive data-bus terminals from two
TLK4015 devices together. Asserting the LCKREFNx to a low state causes Rx_CLK, Rx_ER, and
Rx_DV/LOSx, and the receive data-bus terminals, RDx[0–15], to go to a high-impedance state.
PRBS verification
The TLK4015 also has a built-in BERT function in the receiver side that is enabled by the PRBSEN. It can check
for errors and report the errors by forcing the Rx_ER/PRBS_PASSx terminal low.
reference clock input
The reference clock (GTx_CLK) is an external input clock that synchronizes the transmitter interface. The
reference clock is then multiplied in frequency 10 times to produce the internal serialization bit clock. The internal
serialization bit clock is frequency-locked to the reference clock and used to clock out the serial transmit data
on both its rising and falling edges, providing a serial data rate that is 20 times the reference clock.
operating frequency range
The TLK4015 is optimized for operation at a serial data rate of 1.2 Gbps. The TLK4015 can operate at a serial
data rate between 0.6 Gbps and 1.5 Gbps. The GTx_CLK must be within ±100 PPM of the desired parallel
data-rate clock.
testability
The TLK4015 has a comprehensive suite of built-in self-tests. The loopback function provides for at-speed
testing of the transmit/receive portions of the circuitry. The enable terminal allows for all circuitry to be disabled
so that a quiescent current test can be performed. The PRBS function allows for a built-in self-test (BIST).
loopback testing
The transceiver can provide a self-test function by enabling (LOOPENx) the internal loop-back path. Enabling
this terminal causes serial-transmitted data to be routed internally to the receiver. The parallel output data can
be compared to the parallel input data for functional verification. (The external differential output is held in a
high-impedance state during the loopback testing.)
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