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DDC101 Datasheet, PDF (4/29 Pages) Burr-Brown (TI) – 20-BIT ANALOG-TO-DIGITAL CONVERTER
SECTION 2
SPECIFICATIONS
ELECTRICAL
All specifications with unipolar current input range, TINT = 1ms, correlated double sampling enabled, System Clock = 2MHz, VREF = –2.5V, TA = +25°C and VS = ±5VDC,
unless otherwise noted.
DDC101
PARAMETER
CONDITIONS
INPUTS
Charge Input(6)
Unipolar Input Range
Bipolar Input Range
Input Current
Current Input Range Examples(10)
Unipolar Input Range
Unipolar Input Range
Bipolar Input Range
Bipolar Input Range
Voltage Input Examples(10)
Unipolar Input Range(2)
Bipolar Input Range(2)
DYNAMIC CHARACTERISTICS
Conversion Time
Integration Time
System Clock Input
BTC Output Code
BTC Output Code
Unipolar or Bipolar Range
T
INT
=
100µs
TINT = 1ms
TINT = 100µs
TINT = 1ms
R
IN
=
10MΩ,
T
INT
=
1ms
RIN = 10MΩ, TINT = 1ms
ACCURACY
Unipolar Mode Noise
Noise, Low Level Current Input(1)
Noise, Low Level Current Input(1)
Noise, Low Level Current Input(1)
Noise, Low Level Current Input(1)
Noise, Voltage Input(1, 2)
Differential Linearity Error
Unipolar Input Range
Unipolar or Bipolar Input Range
Integral Linearity Error
Unipolar Input Range(11)
Unipolar or Bipolar Input Range(11)
No Missing Codes
Unipolar Input Range
Bipolar Input Range
Input Bias Current
DC Gain Error
Output Offset Error(8)
Input Offset Voltage(8)
External Voltage Reference, VREF
Internal Test Signal
Internal Test Signal Accuracy
Gain Sensitivity to VREF
PSRR
CSENSOR = 0pF, L = 8
CSENSOR = 0pF, L = 1
C
= 100pF, L = 1
SENSOR
CSENSOR = 500pF, L = 1
RIN ≥ 20MΩ
Entire Range
0.1% FSR Input
1% FSR Input
10% FSR Input
0 to 500 pc/Integration
–1.95 to 0 pc/Integration
0.1% FSR Input
1% FSR Input
10% FSR Input
T
A
=
+25°C
VREF = 2.5V ±0.1V
PERFORMANCE OVER TEMPERATURE
Output Offset Drift(8)
not including bias current drift
Input Offset Voltage Drift(8)
Input Bias Current Drift
+25°C to +45°C
Input Bias Current
Gain Drift(4)
T
A
=
+85°C
DIGITAL INPUT/OUTPUT
Logic Family
Logic Level: VIH
VIL
VOH
V
OL
Data Clock
Data I/O
SETUP Code I/O(9)
Data Format
Straight Binary
Two’s Complement
IIH = +5µA
IIL = +5µA
IOH = 2 TTL Loads
I = 2 TTL Loads
OL
Unipolar or Bipolar Range
Unipolar or Bipolar Range
®
DDC101
MIN
TYP
MAX
UNITS
–1.95
–251.95
–0.0195
–1.95
–2.5195
–251.95
–0.0195
–2.5195
64
64
0.5
500
250
7.8
5
500
2.5
250
5
2.5
256 x 106
106
2
pC/Integration
pC/Integration
µA
µA
nA
µA
nA
V
V
µs
µs
MHz
80
+2.0
–0.3
+2.4
0.0
4
0.9
ppm of FSR, rms(3)
1.6
ppm of FSR, rms
2.1
3
ppm of FSR, rms
4.2
ppm of FSR, rms
1.9
ppm of FSR, rms
±0.005% Reading ±0.5ppm FSR, max
±0.00006
% of FSR
±0.00010
% of FSR
±0.00055
% of FSR
±0.0015
% of FSR
±0.0244% Reading ±2.5ppm FSR, max
±0.0244% Reading ±3.0ppm FSR, max
±0.00028
% of FSR
±0.00050
% of FSR
±0.0027
% of FSR
±0.003
% of FSR
18
Bits
16
Bits
3
10
pA
±0.5
±2
% of FSR
±0.5
ppm of FSR
±0.5
±2
mV
–2.5
VDC
100
nA
±20
nA
1:1
90
dB
0
µV/°C
1
µV/°C
0.1
0.5
pA/°C
8
40
pA
±15
ppm/°C
TTL Compatible CMOS
20
21
+VCC
+0.8
+VCC
0.4
8
4
V
V
V
V
MHz
MHz
Bits
Bits