DDC101 Datasheet, PDF (16/29 Pages) Burr-Brown (TI) – 20-BIT ANALOG-TO-DIGITAL CONVERTER

Aquisition
Time, K
X
N
Oversampled
Initial Data Point
Time,
Clock
Cycles
M
Tracking Interval
Final Data
Point Start
Digital
Output
Measurement Time
DDC101 digital output is precise integration of input during measurement time.
FIGURE 11. Equivalent Integrator Output for Single Integration.
Aquisition
Time
K
M
X
M
Oversampled
X
Final Data Point
Time,
Clock
Cycles
Reset of
Previous Integration
Oversampled
Initial Data Point
Tracking
Interval
Digital
Output
FIGURE 12. Close-up of Initial Oversampled Data Point for DDC101.
has been completed; this occurs M clock periods after the
FDS transition to “ON”. Acquisition, Initial Data Point and
Tracking for the next integration follow automatically. The
DDC101 continues in the Tracking mode until the next FDS
command initiates the measurement of the M final data point
samples. An FDS command is needed for each integration
cycle. In the continuous integration mode, the FDS pulse
width must be less than M clock periods. If the FDS pulse
is held low past this time of M clock periods, the DDC101
will reset as for non-continuous mode (see also Figure 4).
In the continuous mode of operation, the tracking logic of
the DDC101 “remembers” the integration rate of the previ-
ous integration and begins the next integration at the rate of
the previous integration. This allows faster acquisition of the
signal for the next integration.
®
DDC101
16