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BQ2024 Datasheet, PDF (4/19 Pages) Texas Instruments – 1.5K-BIT SERIAL EPROM WITH SDQ INTERFACE
bq2024
SLUS770 – MAY 2007
www.ti.com
EPROM STATUS MEMORY
In addition to the programmable 1536 bits of memory, there are 64 bits of status information contained in the
EPROM STATUS memory. The STATUS memory is accessible with separate commands. The STATUS bits are
EPROM and are read or programmed to indicate various conditions to the software interrogating the bq2024.
The first byte of the STATUS memory contains the write protect page bits, that inhibit programming of the
corresponding page in the 1536-bit main memory area if the appropriate write-protection bit is programmed.
Once a bit has been programmed in the write protect page byte, the entire 32-byte page that corresponds to that
bit can no longer be altered but may still be read. The write protect bits may be cleared by using the WRITE
STATUS command.
The next six bytes of the EPROM STATUS memory contain the page address redirection bytes. Bits in the
EPROM status bytes can indicate to the host what page is substituted for the page by the appropriate
redirection byte. The hardware of the bq2024 makes no decisions based on the contents of the page address
redirection bytes. This feature allows the user's software to make a data patch to the EPROM by indicating that
a particular page or pages should be replaced with those indicated in the page address redirection bytes. The
ones complement of the new page address is written into the page address redirection byte that corresponds to
the original (replaced) page. If a page address redirection byte has an FFh value, the data in the main memory
that corresponds to that page are valid. If a page address redirection byte has some other hex value, the data in
the page corresponding to that redirection byte are invalid, and the valid data can now be found at the ones
complement of the page address indicated by the hexadecimal value stored in the associated page address
redirection byte. A value of FDh in the redirection byte for page 1, for example, indicates that the updated data
are now in page 2. The details for reading and programming the EPROM status memory portion of the bq2024
are given in the Memory Function Commands section.
Table 2. EPROM Status Bytes
ADDRESS (HEX)
00h
01h
02h
03h
04h
05h
06h
07h
PAGE
Write protection bits
BIT0 - write protect page 0
BIT1 - write protect page 1
BIT2 - write protect page 2
BIT3 - write protect page 3
BIT4 -write protect page 4
BIT5 -write protect page 5
BIT6 to 7 -bitmap of used pages
Redirection byte for page 0
Redirection byte for page 1
Redirection byte for page 2
Redirection byte for page 3
Redirection byte for page 4
Redirection byte for page 5
Factory programmed 00h
Error Checking
To validate the data transmitted from the bq2024, the host generates a CRC value from the data as they are
received. This generated value is compared to the CRC value transmitted by the bq2024. If the two CRC values
match, the transmission is error-free. The equivalent polynomial function of this CRC is X8 + X5 + X4 + 1. Details
are found in the CRC Generation Section of this data sheet.
Customizing the bq2024
The 64-bit ID identifies each bq2024. The 48-bit serial number is unique and programmed by Texas Instruments.
The default 8-bit family code is 09h; however, a different value can be reserved on an individual customer basis.
Contact your Texas Instruments sales representative for more information.
Bus Termination
Because the drive output of the bq2024 is an open-drain, N-channel MOSFET, the host must provide a source
current or a 5-kΩ external pullup, as shown in the typical application circuit in Figure 1.
4
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