BQ2024 Datasheet, PDF (10/19 Pages) Texas Instruments – 1.5K-BIT SERIAL EPROM WITH SDQ INTERFACE

bq2024
SLUS770 – MAY 2007
www.ti.com
READ STATUS
The READ STATUS command is used to read data from the EPROM status data field. After issuing a ROM
command, the host issues the READ STATUS command, AAh, followed by the address low byte and then the
address high byte.
NOTE:
An 8-bit CRC of the command byte and address bytes is computed by the bq2024
and read back by the host to confirm that the correct command word and starting
address were received.
If the CRC read by the host is incorrect, a reset pulse must be issued and the entire sequence must be
repeated. If the CRC received by the host is correct, the host issues read time slots and receives data from the
bq2024 starting at the supplied address and continuing until the end of the EPROM Status data field is reached.
At that point, the host receives an 8-bit CRC that is the result of shifting into the CRC generator all of the data
bytes from the initial starting byte through the final factory-programmed byte that contains the 00h value.
This feature is provided because the EPROM status information may change over time making it impossible to
program the data once and include an accompanying CRC that is always valid. Therefore, the READ status
command supplies an 8-bit CRC that is based on (and always is consistent with) the current data stored in the
EPROM status data field.
After the 8-bit CRC is read, the host receives logical 1s from the bq2024 until a reset pulse is issued. The READ
STATUS command sequence can be ended at any point by issuing a reset pulse.
Initialization and ROM
Command
Sequence
READ MEMORY Command
AAh
Address Low
Byte
Read STATUS
Address High Read and Memory Until End
Byte
Verify CRC of STATUS
Memory
A0
A7 A8
A15
Figure 10. READ STATUS Command
Read and
Verify CRC
WRITE STATUS
The Write Status command is used to program the EPROM Status data field after the bq2024 has been selected
by a ROM command
The flow chart in Figure 11 illustrates that the host issues the Write Status command, 55h, followed by the
address low byte and then the address high byte the followed by the byte of data to be programmed.
NOTE:
Individual bytes of address and data are transmitted LSB first. An 8-bit CRC of the
command byte, address bytes, and data byte is computed by the bq2024 and read
back by the host to confirm that the correct command word, starting address, and
data byte were received.
If the CRC read by the host is incorrect, a reset pulse must be issued and the entire sequence must be
repeated. If the CRC received by the host is correct, the program command (5Ah) is issued. After the program
command is issued, then the programming voltage, V_PP is applied to the DATA pin for period t_PROG. Prior to
programming, the first seven bytes of the EPROM STATUS data field appear as logical 1s. For each bit in the
data byte provided by the host that is set to a logical 0, the corresponding bit in the selected byte of the EPROM
STATUS data field is programmed to a logical 0 after the programming pulse has been applied at the byte
location. The eighth byte of the EPROM STATUS byte data field is factory-programmed to contain 00h.
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