BQ2024 Datasheet, PDF (15/19 Pages) Texas Instruments – 1.5K-BIT SERIAL EPROM WITH SDQ INTERFACE

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bq2024
SLUS770 – MAY 2007
In each case where a CRC is used for data transfer validation, the bus master must calculate a CRC value using
the polynomial function previously given and compare the calculated value to either the 8-bit CRC value stored
in the 64-bit ROM portion of the bq2024 (for ROM reads) or the 8-bit CRC value computed within the bq2024.
The comparison of CRC values and decision to continue with an operation are determined entirely by the bus
master. No circuitry on the bq2024 prevents a command sequence from proceeding if the CRC stored in or
calculated by the bq2024 does not match the value generated by the bus master. Proper use of the CRC can
result in a communication channel with a high level of integrity.
CLK
DAT
QD
R
QD
R
QD
R
QD
R
+Q D
R
+Q D
R
QD
R
Figure 17. 8-Bit CRC Generator Circuit (X⁸ + X⁵ + X⁴ + 1)
QD
R
+
UDG-02065
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