CC2564_15 Datasheet, PDF (36/47 Pages) Texas Instruments – Bluetooth® and Dual-Mode Controller

CC256x
SWRS121D – JULY 2012 – REVISED JANUARY 2014
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4.4.2 PCM
Figure 4-3 shows the interface timing for the PCM. Table 4-3 and Table 4-4 list the associated master and
slave parameters, respectively.
T_clk
T_w
T_w
AUD_CLK
t_is
t_ih
AUD_IN / FSYNC_IN
t_op
AUD_OUT / FSYNC_OUT
Figure 4-3. PCM Interface Timing
Symbol
T_clk
Cycle time
Parameter
T_w
High or low pulse width
t_is
AUD_IN setup time
t_ih
AUD_IN hold time
t_op
AUD_OUT propagation time
t_op
FSYNC_OUT propagation time
Table 4-3. PCM Master
Condition
40-pF load
40-pF load
Min
244.14
(4.096 MHz)
50% of T_clk min
25
0
0
0
Symbol
T_clk
Cycle time
Parameter
T_w
High or low pulse width
T_is
AUD_IN setup time
T_ih
AUD_IN hold time
t_is
AUD_FSYNC setup time
t_ih
AUD_FSYNC hold time
t_op
AUD_OUT propagation time
Table 4-4. PCM Slave
Condition
40-pF load
Min
66.67
(15 MHz)
40% of T_clk
8
0
8
0
0
td_aud_swrs064
Max
Unit
15625
(64 kHz)
ns
10
10
Max
Unit
ns
21
36
Device Specifications
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