CC2564_15 Datasheet, PDF (12/47 Pages) Texas Instruments – Bluetooth® and Dual-Mode Controller

CC256x
SWRS121D – JULY 2012 – REVISED JANUARY 2014
www.ti.com
3.4 Clock Inputs
3.4.1 Slow Clock
An external source must supply the slow clock and connect to the SLOW_CLK_IN pin (for example, the
host or external crystal oscillator). The source must be a digital signal in the range of 0 to 1.8 V.
The accuracy of the slow clock frequency must be 32.768 kHz ±250 ppm for Bluetooth use (as specified in
the Bluetooth specification).
The external slow clock must be stable within 64 slow-clock cycles (2 ms) following the release of
nSHUTD.
3.4.2 Fast Clock Using External Clock Source
An external clock source is fed to an internal pulse-shaping cell to provide the fast-clock signal for the
device. The device incorporates an internal, automatic clock-scheme detection mechanism that
automatically detects the fast-clock scheme used and configures the F_REF cell accordingly. This
mechanism ensures that the electrical characteristics (loading) of the fast-clock input remain static
regardless of the scheme used and eliminates any power-consumption penalty-versus-scheme used.
This section describes the requirements for fast clock use. The frequency variation of the fast-clock source
must not exceed ±20 ppm (as defined by the Bluetooth specification).
The external clock can be AC- or DC-coupled, sine or square wave.
3.4.2.1 External F_REF DC-Coupled
Figure 3-3 and Figure 3-4 show the clock configuration when using a square wave, DC-coupled external
source for the fast clock input.
NOTE
A shunt capacitor with a range of 10 nF must be added on the oscillator output to reject high
harmonics and shape the signal to be close to a sinusoidal waveform.
TI recommends using only a dedicated LDO to feed the oscillator. Do not use the same VIO
for the oscillator and the CC256x device.
FREFP
CC256x
FREFM
SWRS121-009
Figure 3-3. Clock Configuration (Square Wave, DC-Coupled)
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Detailed Description
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