TL16C552A Datasheet, PDF (3/39 Pages) Texas Instruments – DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO

functional block diagram
28
CTS0
31
DSR0
DCD0 ²⁹
30
RI0
SIN0 ⁴¹
CS0 ³²
14 – 21
DB0 – DB7
CTS1 ¹³
DSR1 ⁵
DCD1 ⁸
RI1 ⁶
SIN1 ⁶²
CS1 ³
TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
8
8
ACE
#1
ACE
#2
24
RTS0
25
DTR0
26
SOUT0
45
INT0
9 _RXRDY0
22 _TXRDY0
12 _RTS1
11 _DTR1
10 _SOUT1
60 _INT1
61 _RXRDY1
42 _TXRDY1
35 – 33 3
A0 – A2
36
IOW
37
IOR
39
RESET
4
CLK
Select
and
Control
Logic
8
63
ERR
65
SLCT
BUSY ⁶⁶
67
PE
ACK ⁶⁸
PEMD ¹
CS2 ³⁸
ENIRQ ⁴³
Parallel
Port
44
BDO
8 _{53 – 46 PD0 – PD7}
57 _INIT
56 _AFD
55 _STB
58 _SLIN
59 _INT2
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