TL16C552A Datasheet, PDF (12/39 Pages) Texas Instruments – DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO

TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
PARAMETER MEASUREMENT INFORMATION
A2, A1, A0
CS0, CS1, CS2
IOW
IOR
DB0 – DB7
50%
50%
tsu4
tsu5
Valid
Valid
td3
50%
th3
50%
th4
50% ^Active
tw5
50%
td4
tsu6
th5
Valid Data
Figure 5. Write Cycle Timing Waveforms
Serial Out
(SOUT)
50%
Start
Data Bits 5 – 8
td5
Interrupt
(THRE)
tpd2
IOW
(WR THR) ^50%
50%
50%
td7
50%
50%
tpd2
Stop (1– 2)
Parity
Start
50%
td6
50%
50%
IOR
(RD IIR)
IOW
(WR THR)
Figure 6. Transmitter Timing Waveforms
Byte #1
50%
50% ^Active
50%
or
Active
50%
tpd4
50%
SOUT
TXRDY
Data
tpd5
Parity
50%
Stop 50%
Start
td8
50%
Figure 7. Transmitter Ready Mode 0 Timing Waveforms
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