MSP430F551X_1 Datasheet, PDF (3/115 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F551x
MSP430F552x
www.ti.com
SLAS590D – OCTOBER 2009 – REVISED APRIL 2010
T_A
–40°C to 85°C
ORDERING INFORMATION⁽¹⁾
PACKAGED DEVICES⁽²⁾
PLASTIC 80-PIN LQFP (PN)
PLASTIC 64-PIN VQFN (RGC)
MSP430F5529IPN
MSP430F5528IRGC
MSP430F5527IPN
MSP430F5526IRGC
MSP430F5525IPN
MSP430F5524IRGC
MSP430F5521IPN
MSP430F5522IRGC
MSP430F5519IPN
MSP430F5514IRGC
MSP430F5517IPN
MSP430F5513IRGC
MSP430F5515IPN
PLASTIC 80-BALL BGA (ZQE)
MSP430F5528IZQE
MSP430F5526IZQE
MSP430F5524IZQE
MSP430F5522IZQE
MSP430F5514IZQE
MSP430F5513IZQE
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Functional Block Diagram – MSP430F5529IPN, MSP430F5527IPN, MSP430F5525IPN,
MSP430F5521IPN
XIN XOUT RST/NMI DVCC DVSS VCORE AVCC AVSS
PA
PB
PC
PD
P1.x P2.x P3.x P4.x P5.x P6.x P7.x P8.x
DP,DM,PUR
XT2IN
XT2OUT
Unified
Clock
System
ACLK
SMCLK
MCLK
128KB
96KB
64KB
32KB
Flash
8KB+2KB
6KB+2KB
4KB+2KB
RAM
Power
Management
LDO
SVM/SVS
Brownout
SYS
Watchdog
Port Map
Control
(P4)
I/O Ports
P1/P2
2×8 I/Os
Interrupt
& Wakeup
PA
1×16 I/Os
I/O Ports
P3/P4
2×8 I/Os
PB
1×16 I/Os
I/O Ports
P5/P6
2×8 I/Os
PC
1×16 I/Os
I/O Ports
P7/P8
1×8 I/Os
1×3 I/Os
PD
1×11 I/Os
CPUXV2
and
Working
Registers
MAB
MDB
Full-speed
USB
USB-PHY
USB-LDO
USB-PLL
DMA
3 Channel
EEM
(L: 8+2)
JTAG/
SBW
Interface
MPY32
TA0
Timer_A
5 CC
Registers
TA1
Timer_A
3 CC
Registers
TA2
Timer_A
3 CC
Registers
TB0
Timer_B
7 CC
Registers
RTC_A
CRC16
USCI0,1
ADC12_A
USCI_Ax:
UART,
IrDA, SPI
USCI_Bx:
SPI, I2C
12 Bit
200 KSPS
16 Channels
(14 ext/2 int)
Autoscan
REF
COMP_B
12 Channels
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