MSP430F551X_1 Datasheet, PDF (24/115 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F551x
MSP430F552x
SLAS590D – OCTOBER 2009 – REVISED APRIL 2010
www.ti.com
Port Mapping Controller
The port mapping controller allows the flexible and reconfigurable mapping of digital functions to port P4.
Table 9. Port Mapping, Mnemonics, and Functions
VALUE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19 - 30
31 (0FFh)⁽¹⁾
PxMAPy MNEMONIC
PM_NONE
PM_CBOUT0
PM_TB0CLK
PM_ADC12CLK
PM_DMAE0
PM_SVMOUT
PM_TB0OUTH
PM_TB0CCR0A
PM_TB0CCR1A
PM_TB0CCR2A
PM_TB0CCR3A
PM_TB0CCR4A
PM_TB0CCR5A
PM_TB0CCR6A
PM_UCA1RXD
PM_UCA1SOMI
PM_UCA1TXD
PM_UCA1SIMO
PM_UCA1CLK
PM_UCB1STE
PM_UCB1SOMI
PM_UCB1SCL
PM_UCB1SIMO
PM_UCB1SDA
PM_UCB1CLK
PM_UCA1STE
PM_CBOUT1
PM_MCLK
Reserved
PM_ANALOG
INPUT PIN FUNCTION
OUTPUT PIN FUNCTION
None
DVSS
-
Comparator_B output
TB0 clock input
-
ADC12CLK
DMAE0 input
-
SVM output
TB0 high impedance input
TB0OUTH
TB0 CCR0 capture input CCI0A TB0 CCR0 compare output Out0
TB0 CCR1 capture input CCI1A TB0 CCR1 compare output Out1
TB0 CCR2 capture input CCI2A TB0 CCR2 compare output Out2
TB0 CCR3 capture input CCI3A TB0 CCR3 compare output Out3
TB0 CCR4 capture input CCI4A TB0 CCR4 compare output Out4
TB0 CCR5 capture input CCI5A TB0 CCR5 compare output Out5
TB0 CCR6 capture input CCI6A TB0 CCR6 compare output Out6
USCI_A1 UART RXD (Direction controlled by USCI - input)
USCI_A1 SPI slave out master in (direction controlled by USCI)
USCI_A1 UART TXD (Direction controlled by USCI - output)
USCI_A1 SPI slave in master out (direction controlled by USCI)
USCI_A1 clock input/output (direction controlled by USCI)
USCI_B1 SPI slave transmit enable (direction controlled by USCI)
USCI_B1 SPI slave out master in (direction controlled by USCI)
USCI_B1 I2C clock (open drain and direction controlled by USCI)
USCI_B1 SPI slave in master out (direction controlled by USCI)
USCI_B1 I2C data (open drain and direction controlled by USCI)
USCI_B1 clock input/output (direction controlled by USCI)
USCI_A1 SPI slave transmit enable (direction controlled by USCI)
None
Comparator_B output
None
MCLK
None
DVSS
Disables the output driver as well as the input Schmitt-trigger to prevent
parasitic cross currents when applying analog signals.
(1) The value of the PMPAP_ANALOG mnemonic is set to 0FFh. The port mapping registers are only 5 bits wide and the upper bits are
ignored resulting in a read out value of 31.
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