MSP430F551X_1 Datasheet, PDF (14/115 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430F551x
MSP430F552x
SLAS590D – OCTOBER 2009 – REVISED APRIL 2010
www.ti.com
Table 2. TERMINAL FUNCTIONS (continued)
TERMINAL
NAME
PN
P3.4/UCA0RXD/UCA0SOMI
41
P3.5/TB0.5
42
P3.6/TB0.6
43
P3.7/TB0OUTH/SVMOUT
44
P4.0/PM_UCB1STE/
PM_UCA1CLK
45
P4.1/PM_UCB1SIMO/
PM_UCB1SDA
46
P4.2/PM_UCB1SOMI/
PM_UCB1SCL
47
P4.3/PM_UCB1CLK/
PM_UCA1STE
48
DVSS2
49
DVCC2
50
P4.4/PM_UCA1TXD/
PM_UCA1SIMO
51
P4.5/PM_UCA1RXD/
PM_UCA1SOMI
52
P4.6/PM_NONE
53
P4.7/PM_NONE
54
P5.6/TB0.0
55
P5.7/TB0.1
56
NO.
I/O ⁽¹⁾
DESCRIPTION
RGC ZQE
General-purpose digital I/O
38 G7 I/O Receive data – USCI_A0 UART mode
Slave out, master in – USCI_A0 SPI mode
N/A N/A
General-purpose digital I/O (not available on '5528, '5526, '5524, '5522, '5514,
I/O '5513 devices)
TB0 CCR5 capture: CCI5A input, compare: Out5 output
N/A N/A
General-purpose digital I/O (not available on '5528, '5526, '5524, '5522, '5514,
I/O '5513 devices)
TB0 CCR6 capture: CCI6A input, compare: Out6 output
N/A N/A
General-purpose digital I/O (not available on '5528, '5526, '5524, '5522, '5514,
'5513 devices)
I/O Switch all PWM outputs high impedance input – TB0 (not available on '5528,
'5526, '5524, '5522, '5514, '5513 devices)
SVM output (not available on '5528, '5526, '5524, '5522, '5514, '5513 devices)
General-purpose digital I/O with reconfigurable port mapping secondary
function
41 E8 I/O Default mapping: Slave transmit enable – USCI_B1 SPI mode
Default mapping: Clock signal input – USCI_A1 SPI slave mode
Default mapping: Clock signal output – USCI_A1 SPI master mode
General-purpose digital I/O with reconfigurable port mapping secondary
42
E7
I/O
function
Default mapping: Slave in, master out – USCI_B1 SPI mode
Default mapping: I2C data – USCI_B1 I2C mode
General-purpose digital I/O with reconfigurable port mapping secondary
43
D9
I/O
function
Default mapping: Slave out, master in – USCI_B1 SPI mode
Default mapping: I2C clock – USCI_B1 I2C mode
General-purpose digital I/O with reconfigurable port mapping secondary
function
44 D8 I/O Default mapping: Clock signal input – USCI_B1 SPI slave mode
Default mapping: Clock signal output – USCI_B1 SPI master mode
Default mapping: Slave transmit enable – USCI_A1 SPI mode
39 F9
Digital ground supply
40 E9
Digital power supply
General-purpose digital I/O with reconfigurable port mapping secondary
45
D7
I/O
function
Default mapping: Transmit data – USCI_A1 UART mode
Default mapping: Slave in, master out – USCI_A1 SPI mode
General-purpose digital I/O with reconfigurable port mapping secondary
46
C9
I/O
function
Default mapping: Receive data – USCI_A1 UART mode
Default mapping: Slave out, master in – USCI_A1 SPI mode
General-purpose digital I/O with reconfigurable port mapping secondary
47 C8 I/O function
Default mapping: no secondary function.
General-purpose digital I/O with reconfigurable port mapping secondary
48 C7 I/O function
Default mapping: no secondary function.
N/A N/A
General-purpose digital I/O (not available on '5528, '5526, '5524, '5522, '5514,
I/O
'5513 devices)
TB0 CCR0 capture: CCI0A input, compare: Out0 output (not available on
'5528, '5526, '5524, '5522, '5514, '5513 devices)
N/A N/A
General-purpose digital I/O (not available on '5528, '5526, '5524, '5522, '5514,
I/O
'5513 devices)
TB0 CCR1 capture: CCI1A input, compare: Out1 output (not available on
'5528, '5526, '5524, '5522, '5514, '5513 devices)
14
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