TMS320DM6467_08 Datasheet, PDF (267/340 Pages) Texas Instruments – Digital Media System-on-Chip

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HEX ADDRESS
RANGE
0x01C6 44A4
0x01C6 44A6
0x01C6 44A7
0x01C6 4502
0x01C6 4508
0x01C6 450A
0x01C6 450B
0x01C6 450F
0x01C6 4510
0x01C6 4512
0x01C6 4514
0x01C6 4516
0x01C6 4518
0x01C6 451A
0x01C6 451B
0x01C6 451C
0x01C6 451D
0x01C6 4520
0x01C6 4522
0x01C6 4524
0x01C6 4526
0x01C6 4528
0x01C6 452A
0x01C6 452B
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0x01C6 452D
0x01C6 4530
TMS320DM6467
Digital Media System-on-Chip
SPRS403A – DECEMBER 2007 – REVISED MAY 2008
Table 6-75. USB2.0 Registers (continued)
ACRONYM
REGISTER NAME
RXFUNCADDR
Address of the target function that has to be accessed through the associated RX
Endpoint
RXHUBADDR
Address of the hub that has to be accessed through the associated RX Endpoint.
This is used only when full-speed or low-speed device is connected via a USB2.0
high-speed hub.
RXHUBPORT
Port of the hub that has to be accessed through the associated RX Endpoint.
This is used only when full-speed or low-speed device is connected via a USB2.0
high-speed hub.
Control and Status Register for Endpoint 0 - EOCSR0
PERI_CSR0
Control Status Register for Endpoint 0 in Peripheral mode
HOST_CSR0
Control Status Register for Endpoint 0 in Host mode
COUNT0
Number of Received Bytes in Endpoint 0 FIFO
HOST_TYPE0
Defines the Speed of Endpoint 0
HOST_NAKLIMIT0
Sets the NAK response timeout on Endpoint 0.
CONFIGDATA
Returns details of core configuration
Control and Status Register for Endpoint 1 - EOCSR1
TXMAXP
Maximum Packet size for Peripheral/Host TX Endpoint
PERI_TXCSR
Control Status Register for Peripheral TX Endpoint
HOST_TXCSR
Control Status Register for Host TX Endpoint
RXMAXP
Maximum Packet Size for Peripheral/Host RX Endpoint
PERI_RXCSR
Control Status Register for Peripheral RX Endpoint
HOST_RXCSR
Control Status Register for Host RX Endpoint
RXCOUNT
Number of Bytes in Host RX Endpoint FIFO
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host TX endpoint.
HOST_TXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host TX endpoint.
HOST_RXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host RX endpoint.
HOST_RXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host RX endpoint.
Control and Status Register for Endpoint 2 - EOCSR2
TXMAXP
Maximum Packet Size for Peripheral/Host TX Endpoint
PERI_TXCSR
Control Status Register for Peripheral TX Endpoint
HOST_TXCSR
Control Status Register for Host TX Endpoint
RXMAXP
Maximum Packet Size for Peripheral/Host RX Endpoint
PERI_RXCSR
Control Status Register for Peripheral RX Endpoint
HOST_RXCSR
Control Status Register for Host RX Endpoint
RXCOUNT
Number of Bytes in Host RX Endpoint FIFO
HOST_TXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host TX endpoint.
HOST_TXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host TX endpoint.
HOST_RXTYPE
Sets the operating speed, transaction protocol and peripheral endpoint number
for the host RX endpoint.
HOST_RXINTERVAL
Sets the polling interval for Interrupt/ISOC transactions or the NAK response
timeout on Bulk transactions for host RX endpoint.
Control and Status Register for Endpoint 3 - EOCSR3
TXMAXP
Maximum Packet Size for Peripheral/Host TX Endpoint
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Peripheral Information and Electrical Specifications 267