TMS320DM6467_08 Datasheet, PDF (124/340 Pages) Texas Instruments – Digital Media System-on-Chip

TMS320DM6467
Digital Media System-on-Chip
SPRS403A – DECEMBER 2007 – REVISED MAY 2008
www.ti.com
3.7.3.9 UART1 Pin Muxing
The UART1 module can operate as either a UART or IrDA/CIR interface. The UART1 pin muxing options
are shown in Table 3-35. When UART operation is selected, UART1CTL must be set to either ‘00’ for
UART with flow control or ‘01’ for UART without flow control signals. When IrDA/CIR operation is selected,
UART1CTL must be set to ‘10’ to use the IrDA/CIR signals. If UART1 is unused, then setting UART1CTL
= 11 muxes GPIO function onto all the pins. The UART1 pin functions may be overridden based on the
settings of TSPIMUX and TSPOMUX
TSPIMUX[1]
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Table 3-35. UART1 Pin Muxing
TSPIMUX[0] TSPOMUX[1] TSPOMUX[0] UART1CTL[1] UART1CTL[0]
x
0
x
0
0
x
0
x
0
1
x
0
x
1
0
x
0
x
1
1
x
1
0
0
0
x
1
0
0
1
x
1
0
1
0
x
1
0
1
1
x
1
1
0
0
x
1
1
0
1
x
1
1
1
0
x
1
1
1
1
0
0
x
0
x
0
0
x
1
0
0
0
x
1
1
0
1
0
0
x
0
1
0
1
0
0
1
0
1
1
0
1
1
0
x
0
1
1
1
0
0
1
1
1
1
1
0
x
0
x
1
0
x
1
0
1
0
x
1
1
1
1
0
0
x
1
1
0
1
0
1
1
0
1
1
1
1
1
x
x
URXD1/
TS0_DIN7/
GP[23]
URXD1
URXD1
URXD1
GP[23]
URXD1
URXD1
URXD1
GP[23]
URXD1
URXD1
URXD1
GP[23]
URXD1
URXD1
GP[23]
URXD1
URXD1
GP[23]
URXD1
URXD1
GP[23]
TS0_DIN7
TS0_DIN7
TS0_DIN7
TS0_DIN7
TS0_DIN7
TS0_DIN7
TS0_DIN7
PIN FUNCTIONS
UTXD1/
URCTX1/
TS0_DOUT7/
GP[24]
URTS1/
UIRTX1/
TS0_WAITO/
GP[25]
UTXD1
URTS1
UTXD1
GP[25]
URCTX1
UIRTX1
GP[24]
GP[25]
UTXD1
URTS1
UTXD1
GP[25]
URCTX1
UIRTX1
GP[24]
GP[25]
TS0_DOUT7
URTS1
TS0_DOUT7
GP[25]
TS0_DOUT7
UIRTX1
TS0_DOUT7
GP[25]
UTXD1
TS0_WAITO
URCTX1
TS0_WAITO
GP[24]
TS0_WAITO
UTXD1
TS0_WAITO
URCTX1
TS0_WAITO
GP[24]
TS0_WAITO
TS0_DOUT7
TS0_WAITO
TS0_DOUT7
TS0_WAITO
TS0_DOUT7
TS0_WAITO
UTXD1
TS0_WAITO
URCTX1
TS0_WAITO
GP[24]
TS0_WAITO
UTXD1
TS0_WAITO
URCTX1
TS0_WAITO
GP[24]
TS0_WAITO
TS0_DOUT7
TS0_WAITO
UCTS1/
USD1/
TS0_EN_WAITO/
GP[26]
UCTS1
GP[26]
USD1
GP[26]
UCTS1
GP[26]
USD1
GP[26]
UCTS1
GP[26]
USD1
GP[26]
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
TS0_EN_WAITO
124 Device Configurations
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