TLC320AD75C Datasheet, PDF (25/43 Pages) Texas Instruments – 20-Bit Sigma-Delta Stereo ADA Circuit

3 Specifications
3.1 Absolute Maximum Ratings Over Operating Free-Air Temperature Range
(unless otherwise noted)^†
Supply voltage range, AV_DD, LV_DD (see Note 1) . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Supply voltage range, V_DD1, V_35A (see Note 2) . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6.5 V
Supply voltage range, PV_DD(L/R), V_DD2, V_35D, XV_DD(see Note 3) . . . . – 0.3 V to 6.5 V
Analog input voltage range, INLP, INLM, INRP, INRM . . . . . . . – 0.3 V to AV_DD + 0.3 V
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to V_DD1/2 + 0.3 V
Output voltage range, V_O: L1, L2, R1, R2 . . . . . . . . . . . . . . . . . – 0.3 V to AV_DD + 0.3 V
Operating free-air temperature range, T_A . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0°C to 70°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Case temperature for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . 260°C
† _{Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These}
are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated
under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
NOTES: 1. Voltage values for maximum ratings are with respect to AVSS.
2. Voltage values for maximum ratings are with respect to VSS1.
3. Voltage values for maximum ratings are with respect to VSS2.
3.2 Recommended Operating Conditions
MIN NOM MAX UNIT
Analog supply voltage, AVDD (see Note 4)
Digital supply voltage, VDD1
Analog logic supply voltage, LVDD
Reference voltage at REFI
4.75
5 5.25 V
4.75
5 5.25 V
4.75
5 5.25 V
3.2
V
Digital supply voltage, V35A, V35D
3
Digital supply voltage, VDD2
4.75
Digital supply voltage, PVDDL, PVDDR
4.75
Clock supply voltage, XVDD
4.75
Setup time, SCLKA/SCLKD↑ before LRCKA/LRCKD valid, tsu1 (see Figure 4–2)
50
Setup time, LRCKA/LRCKD valid before SCLKA/SCLKD↑, tsu2 (see Figure 4–2)
50
Load resistance at ADOUT, RL
8
Operating free-air temperature, TA
0
NOTE 4: Voltages at analog inputs and outputs and AVDD are with respect to AVSS.
3.3 5.25 V
5 5.25 V
5 5.25 V
5 5.25 V
ns
ns
kΩ
70 °C
3–1