TLC320AD75C Datasheet, PDF (15/43 Pages) Texas Instruments – 20-Bit Sigma-Delta Stereo ADA Circuit

2.2 Differential Input to the ADC
The input to the ADC is differential in order to provide common-mode noise rejection and increase the input
dynamic range. Figure 2–3 shows the analog input signals used in a differential configuration to achieve a
6.4 V_I(PP) differential swing with a 3.2 V_I(PP) swing per input line.
TLC320AD75C
4.1 V
2.5 V
INLP, INRP
0.9 V
4.1 V
2.5 V
0.9 V
INLM, INRM
Figure 2–3. Differential Analog-Input Configuration
2.3 Sigma-Delta Modulator for the ADC
The modulator is a fourth-order sigma-delta modulator with 64 times oversampling. The ADC provides
high-resolution, low-noise performance from a 1-bit converter using oversampling techniques.
2.4 Decimation Filter
The decimation filter after the sigma-delta ADC modulator reduces the digital data rate to the sampling rate
of LRCKA. This is accomplished by decimating with a ratio of 1:64.
2.5 High-Pass Filter
The high-pass filter removes dc from the input of the ADC. The output of this filter is a 2’s-complement data
word of 20 bits serially clocked out. If the input value exceeds the full range of the converter, the output of
the high-pass filter is held at the appropriate extreme until the input returns to the analog input range of the
TLC320AD75C.
2–3