TMS320C6424 Datasheet, PDF (236/243 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6424
Fixed-Point Digital Signal Processor
SPRS347A – MARCH 2007 – REVISED APRIL 2007
6.21.2 GPIO Peripheral Input/Output Electrical Data/Timing
Table 6-89. Timing Requirements for GPIO Inputs⁽¹⁾ (see Figure 6-49)
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-400
-500
NO.
-600
UNIT
MIN MAX
1
t_w(GPIH)
2
t_w(GPIL)
Pulse duration, GP[x] input high
Pulse duration, GP[x] input low
2C ⁽²⁾
ns
2C ⁽²⁾
ns
(1) The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have C6424 recognize
the GP[x] input changes through software polling of the GPIO register, the GP[x] input duration must be extended to allow C6424
enough time to access the GPIO register through the internal bus.
(2) C = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use C = 10ns.
Table 6-90. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs
(see Figure 6-49)
NO.
PARAMETER
-400
-500
-600
UNIT
MIN MAX
3
t_w(GPOH)
4
t_w(GPOL)
Pulse duration, GP[x] output high
Pulse duration, GP[x] output low
2C ^{(1) (2)}
ns
2C ^{(1) (2)}
ns
(1) This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the
GPIO is dependent upon internal bus activity.
(2) C = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use C = 10ns.
GP[x]
Input
GP[x]
Output
2
1
4
3
Figure 6-49. GPIO Port Timing
236 Peripheral Information and Electrical Specifications
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