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TMS320C6424 Datasheet, PDF (124/243 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
TMS320C6424
Fixed-Point Digital Signal Processor
SPRS347A – MARCH 2007 – REVISED APRIL 2007
5.2 Recommended Operating Conditions(1)
www.ti.com
MIN
NOM
MAX UNIT
CVDD
Supply voltage, Core (CVDD) (2)
(-600, -500, -400
devices)
(-400 devices)
1.14
1.2
1.0
1.05
1.26 V
1.1 V
DVDD
VSS
DDR_VREF
DDR_ZP
DDR_ZN
Supply voltage, I/O, 3.3V (DVDD33)
Supply voltage, I/O, 1.8V (DVDDR2, DDR_VDDDLL, PLLPWR18,
MXVDD (3))
Supply ground (VSS, DDR_VSSDLL, MXVSS(4))
DDR2 reference voltage(5)
DDR2 impedance control, connected via 200 Ω resistor to VSS
DDR2 impedance control, connected via 200 Ω resistor to
DVDDR2
3.14
1.71
0
0.49DVDDR2
3.3
1.8
0
0.5DVDDR2
VSS
DVDDR2
3.46 V
1.89 V
0V
0.51DVDDR2
V
V
V
High-level input voltage, 3.3V (except PCI-capable and I2C pins)
2
V
VIH
High-level input voltage, PCI
High-level input voltage, I2C
0.5DVDD33
0.7DVDD33
DVDD33 + 0.5
V
Low-level input voltage, 3.3V (except PCI-capable and I2C pins)
0.8 V
VIL
Low-level input voltage, PCI
–0.5
0.3DVDD33
V
Low-level input voltage, I2C
0
Commercial
0
TJ
Operating Junction temperature(6)(7)
Extended
–40
0.3DVDD33
V
90 °C
125 °C
Commercial
0
TA
Operating Ambient temperature(7)
Extended
-40
70 °C
85 °C
(-600 devices)
600 MHz
FSYSCLK1
DSP Operating Frequency (SYSCLK1)
(-500 devices)
500 MHz
(-400 devices)
400 MHz
(1) For -400 speed devices, either a 1.05-V or a 1.2-V core supply voltage can be used. The actual voltage must be determined at device
power-up, and not be changed dynamically during run-time.
(2) Future variants of TI SoC devices may operate at voltages ranging from 0.9 V to 1.4 V to provide a range of system power/performance
options. TI highly recommends that users design-in a supply that can handle multiple voltages within this range (i.e., 1.0 V, 1.05 V,
1.1 V, 1.14 V, 1.2 V, 1.26 V with ± 3% tolerances) by implementing simple board changes such as reference resistor values or input pin
configuration modifications. Not incorporating a flexible supply may limit the system's ability to easily adapt to future versions of TI SoC
devices.
(3) Oscillator 1.8 V power supply (MXVDD) can be connected to the same 1.8 V power supply as DVDDR2.
(4) Oscillator ground (MXVSS) must be kept separate from other grounds and connected directly to the crystal load capacitor ground.
(5) DDR_VREF is expected to equal 0.5DVDDR2 of the transmitting device and to track variations in the DVDDR2.
(6) In the absence of a heat sink or direct thermal attachment on the top of the device, use the following formula to determine the device
junction temperature: TJ = TC + (Power x PsiJT). Power and TC can be measured by the user. Section 7.1, Thermal Data for ZWT and
Section 7.1.1, Thermal Data for ZDU provide the junction-to-package top (PSIJT) value based on airflow in the system. In the presence
of a heat sink or direct thermal attachment on the top of the device, additional calculations and considerations must be taken into
account. For more detailed information on thermal considerations, measurements, and calculations, see the Thermal Considerations
Application Report (literature number SPRAATBD).
(7) Applications must meet both the Operating Junction Temperature and Operating Ambient Temperature requirements. For more detailed
information on thermal considerations, measurements, and calculations, see the Thermal Considerations Application Report (literature
number SPRAATBD).
124 Device Operating Conditions
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