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| TMS320DM6435 Datasheet, PDF (20/252 Pages) Texas Instruments – Digital Media Processor | |||
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TMS320DM6435
Digital Media Processor
SPRS344B â NOVEMBER 2006 â REVISED NOVEMBER 2007
www.ti.com
2.5 Pin Assignments
Extensive use of pin multiplexing is used to accommodate the largest number of peripheral functions in
the smallest possible package. Pin multiplexing is controlled using a combination of hardware
configuration at device reset and software programmable register settings. For more information on pin
muxing, see Section 3.7, Multiplexed Pin Configurations of this document.
2.5.1 Pin Map (Bottom View)
Figure 2-2 through Figure 2-5 show the bottom view of the ZWT package pin assignments in four
quadrants (A, B, C, and D). Figure 2-6 through Figure 2-9 show the bottom view of the ZDU package pin
assignments in four quadrants (A, B, C, and D).
1
2
3
4
5
6
7
8
9
10
W
VSS
VSS
DDR_D[7]
DDR_D[9] DDR_D[12] DDR_D[14] DDR_CLK
DDR_CLK
DDR_A[12]
DDR_A[11] W
V
DVDDR2
DDR_D[4]
DDR_D[6]
DDR_D[8]
DDR_D[11] DDR_D[13] DDR_D[15] DDR_CKE DDR_BA[1]
DDR_A[8]
V
U DDR_D[2]
DDR_D[3]
DDR_D[5] DDR_DQS[0] DDR_D[10] DDR_DQS[1] DDR_RAS DDR_BA[0] DDR_BA[2] DDR_A[10] U
T DDR_D[0]
DDR_D[1]
RSV16
DDR_DQM[0]
DVDDR2
DDR_DQM[1] DDR_CAS
DDR_WE
DDR_CS
DDR_ZN
T
R
VSS
TRST
TMS
DVDDR2
VSS
DVDDR2
VSS
DVDDR2
VSS
DVDDR2
R
P
DVDD33
EMU0
TDO
TDI
DVDDR2
VSS
DVDDR2
VSS
DVDDR2
VSS
P
N
TCK
EMU1
RESETOUT
POR
VSS
DVDD33
VSS
CVDD
VSS
CVDD
N
CLKOUT0/
M
PWM2/
SCL
GP[84]
L
UCTS0
GP[87]
URXD0/
GP[85]
K
VSS
1
TINP0L/
GP[98]
2
SDA
RESET
DVDD33
URTS0/
PWM0/
GP[88]
UTXD0/
GP[86]
3
HECC_RX/
TINP1L/
URXD1/
GP[56]
HECC_TX/
TOUT1L/
UTXD1/
GP[55]
4
RSV3
RSV2
5
VSS
DVDD33
VSS
6
CVDD
VSS
CVDD
7
VSS
CVDD
VSS
8
CVDD
VSS
CVDD
9
VSS
M
CVDD
L
VSS
K
10
20
Device Overview
Figure 2-2. ZWT Pin Map [Quadrant A]
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