TMS320DM6435 Datasheet, PDF (107/252 Pages) Texas Instruments – Digital Media Processor

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TMS320DM6435
Digital Media Processor
SPRS344B – NOVEMBER 2006 – REVISED NOVEMBER 2007
3.7.3.8 Serial Port Block
This block of 12 pins consists of McASP0, McBSP0, and GPIO muxed pins. The following register fields
select the pin functions in the Serial Port Block:
• PINMUX1.SPBK0
• PINMUX1.SPBK1
The Serial Port Block is further subdivided into these sub-blocks:
• Serial Port Sub-Block 0: McBSP0, part of McASP0, and GPIO.
• Serial Port Sub-Block 1: part of McASP0 and GPIO.
Table 3-32 summarizes the 12 pins in the Serial Port Block, the multiplexed function on each pin, and the
PINMUX configurations to select the corresponding function.
SIGNAL NAME
ACLKR0/CLKX0/GP[99]
AFSR0/DR0/GP[100]
AHCLKR0/CLKR0/GP[101]
AXR0[3]/FSR0/GP[102]
AXR0[2]/FSX0/GP[103]
AXR0[1]/DX0/GP[104]
AXR0[0]/GP[105]
ACLKX0/GP[106]
AFSX0/GP[107]
AHCLKX0/GP[108]
AMUTEIN0/GP[109]
AMUTE0/GP[110]
Table 3-32. Serial Port Block Muxed Pins Selection
MULTIPLEXED FUNCTIONS
McASP0
McBSP0
FUNCTION
SELECT
FUNCTION
SELECT
Serial Port Sub-block 0
ACLKR0
CLKX0
AFSR0
DR0
AHCLKR0
AXR0[3]
SPBK0 = 10
CLKR0
FSR0
SPBK0 = 01
AXR0[2]
FSX0
AXR0[1]
DX0
Serial Port Sub-block 1
AXR0[0]
–
–
ACLKX0
–
–
AFSX0
–
–
SPBK1 = 10
AHCLKX0
–
–
AMUTEIN0
–
–
AMUTE0
–
–
GPIO
FUNCTION
SELECT
GP[99]
GP[100]
GP[101]
GP[102]
GP[103]
GP[104]
SPBK0 = 00
GP[105]
GP[106]
GP[107]
GP[108]
GP[109]
GP[110]
SPBK1 = 00
As discussed in Section 3.7.3.2, Peripherals Spanning Multiple Pin Mux Blocks, the McBSP0 pins span
across two Pin Mux Blocks: Serial Port Sub-Block0, and Timer0 Block. For proper McBSP0 operation, the
Serial Port Sub-Block0 must be programmed to select McBSP0 function. The McBSP0 CLKS0 pin in the
Timer0 Block is optional for McBSP0 operation. CLKS0 is only needed if you desire using CLKS0 as an
external clock source to the McBSP0 internal sample rate generator.
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Device Configuration 107