TLC3544_07 Datasheet, PDF (2/42 Pages) Texas Instruments – 5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS

TLC3544, TLC3548
5-V ANALOG, 3-/5-V DIGITAL, 14-BIT, 200-KSPS, 4-/8-CHANNELS SERIAL
ANALOG-TO-DIGITAL CONVERTERS WITH 0-5 V (PSEUDODIFFERENTIAL) INPUTS
SLAS266C – OCTOBER 2000 – REVISED MAY 2003
description (continued)
In addition to being a high-speed ADC with versatile control capability, these devices have an on-chip analog
multiplexer (MUX) that can select any analog input or one of three self-test voltages. The sample-and-hold
function is automatically started after the fourth SCLK (normal sampling) or can be controlled by CSTART to
extend the sampling period (extended sampling). The normal sampling period can also be programmed as short
sampling (12 SCLKs) or long sampling (44 SCLKs) to accommodate the faster SCLK operation popular among
high-performance signal processors. The TLC3544 and TLC3548 are designed to operate with low power
consumption. The power saving feature is further enhanced with software power-down/ autopower-down
modes and programmable conversion speeds. The conversion clock (internal OSC) is built in. The converter
can also use an external SCLK as the conversion clock for maximum flexibility. The TLC3544 and TLC3548
have a 4-V internal reference. The converters are specified with unipolar input range of 0-V to 5-V when a 5-V
external reference is used.
TA
0°C to 70°C
– 40°C to 85°C
AVAILABLE OPTIONS
PACKAGED DEVICES
20-TSSOP
(PW)
20-SOIC
(DW)
24-SOIC
(DW)
TLC3544CPW TLC3544CDW TLC3548CDW
TLC3544IPW TLC3544IDW TLC3548IDW
24-TSSOP
(PW)
TLC3548CPW
TLC3548IPW
functional block diagram
DVDD AVDD
REFP
BGAP
REFM
4-V
Reference
X8 X4
A0 A0
A1 A1
A2 A2
A3 A3
A4 X
A5 X
A6 X
A7 X
SDI
SCLK
CS
FS
CSTART
Analog
MUX
OSC
Command
Decode
CMR (4 MSBs)
SAR
ADC
Conversion
Clock
CFR
FIFO
X8
SDO
4-Bit
Counter
Control
Logic
EOC/INT
DGND AGND
2
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