CDCE421 Datasheet, PDF (2/30 Pages) Texas Instruments – Fully Integrated Wide-Range, Low-Jitter, Crystal-Oscillator Clock Generator

CDCE421
SCAS842 – APRIL 2007
www.ti.com
DESCRIPTION
The CDCE421 is a high-performance, low-phase-noise clock generator. It has two fully integrated, low-noise,
LC-based voltage controlled oscillators (VCOs) that operate in the 1.750-GHz–2.350-GHz frequency range. It
has an integrated crystal oscillator that operates in conjunction with an external AT-cut crystal to produce a
stable frequency reference for the PLL-based frequency synthesizer.
The output frequency (f_out) is proportional to the frequency of the input crystal (f_xtal). The prescaler divider,
feedback divider, output divider, and VCO selection are what set (f_out) with respect to (f_xtal). For a desired
frequency (f_out), look in Table 1 and find the corresponding settings in the same row. Use Equation 1 to calculate
the exact crystal oscillator frequency needed for the desired output.
ǒ Ǔ f_xtal +
OutputDivider
FeedbackDivider
f_out
(1)
Output divider⁽¹⁾ = 1, 2, 4, 8, 16, or 32
Feedback divider⁽²⁾ = 12, 16, 20, or 32
(1)_{Output divider and feedback divider should be from the same row in Table 1.}
(2)_{Feedback divider is set automatically with respect to the prescaler setting in Table 1.}
A high-level block diagram of the CDCE421 is shown in Figure 1.
The CDCE421 supports one differential LVDS clock output or one differential LVPECL output.
All device settings are programmable through a Texas Instruments proprietary simple serial interface.
The device operates in a 3.3-V supply environment and is characterized for operation from –40°C to 85°C.
The CDCE421 is available in die form or in a QFN-24 package.
XIN 1
XIN 2
CE
SDATA
Crystal
Oscillator
Feedback
Divider
12, 16, 20 and 32
PFD/
Charge Pump
Loop Filter
VCO 1 VCO 2
1890 2200
Prescaler
2, 3, 4 and 5
1-Pin
Interface
and
Control
EEPROM
Output
Divider
1, 2, 4, 8, 16 and 32
LVPCL
LVDS
Figure 1. High-Level Block Diagram of the CDCE421
B0217-01
In the CDCE421, the feedback divider is set automatically with respect to the prescaler setting. The product of
the prescaler and the feedback divider will be either 60 or 64, as shown in Table 1, to keep the control loop
stable.
2
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