CDCE421 Datasheet, PDF (11/30 Pages) Texas Instruments – Fully Integrated Wide-Range, Low-Jitter, Crystal-Oscillator Clock Generator

www.ti.com
CDCE421
SCAS842 – APRIL 2007
PACKAGE (DIE)
The CDCE421 is available in die form or in a QFN 24-pin package. The die version pad locations and numbers
are shown in Figure 5.
10 9 8 7
v_cc
GND
11
SIGNALS
12
TI TEST ONLY
13
14
15
16
17
6
5
4
PAD1
3
2
Figure 5. Pinout of the CDCE421 Die
M0070-01
PAD DESCRIPTION
Table 2 shows the pin description for the CDCE421 die.
TERMINAL
NAME
CE
OUTN
OUTP
SDATA
Test pins
V_CC
V_SS
XIN 1
XIN 2
Table 2. Pad Description of CDCE421 (See Appendix B for More Information)
PAD NO.
1
3
6
2
7, 8, 11–13,
16, 17
9, 10
4, 5
14
15
TYPE
O
O
O
I
ESD
Protection
Description
Y
Chip enable
CE = 1: enable the device and the outputs.
CE = 0: disable all current sources; in LVDS mode, LVDSP = LVDSN = Hi-Z; in
LVPECL mode, LVPECLP = LVPECLN = Hi-Z.
Y
High-speed negative differential LVPECL or LVDS outputs. (Outputs are enabled
by CE and selected by the EEPROM configuration registers.)
Y
High-speed positive differential LVPECL or LVDS outputs. (Outputs are enabled by
CE and selected by the EEPROM configuration registers.)
Y
Programming pin using TI proprietary interface protocol
Do not connect (TI Manufacturing test pins).
Power
GND
I
I
Y
3.3-V power supply
Y
Ground
Y
Connect XIN1 to one end of the crystal and XIN2 to the other end of the crystal.
N
Submit Documentation Feedback
11