CDCE421 Datasheet, PDF (15/30 Pages) Texas Instruments – Fully Integrated Wide-Range, Low-Jitter, Crystal-Oscillator Clock Generator

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CDCE421
SCAS842 – APRIL 2007
JITTER CHARACTERISTICS IN INPUT CLOCK MODE
The jitter characterization test is performed using an LVCMOS input signal driving a CDCE421 device packaged
in the QFN-24 package.
0.1 mF
50 W
100 pF
XIN 1
CDCE421
XIN 2
150 W
150 W
Phase Noise
Analyzer
150 W
Figure 7. Jitter Test Configuration for an LVTTL Input Driving the CDCE421
S0246-01
Table 4. Measured Output Jitter
Output
Input
Frequency Frequency
(MHz)
(MHz)
100
33.3333
106.25 35.4167
125
31.25
156.25 31.25
212.5 35.4167
250
31.25
312.5 31.25
370
30.8333
400
33.3333
708
35.4
1000
31.25
VCO
1
2
1
1
2
1
1
1
1
2
1
Pre-
scaler
5
5
4
3
5
4
3
5
5
3
2
Divider
4
4
4
4
2
2
2
1
1
1
1
LVPECL (Typical Measured Output
Jitter), ps
JRMS (12
kHz to 20
MHz)
Tj (Total
Jitter)
Dj (Deter-
ministic
Jitter)
0.507
35.33
11.54
0.53
30.39
11
0.529
47.47
25.2
0.472
31.54
9.12
0.512
33.96
13.78
0.42
36.98
18.52
0.378
29.82
11
0.369
29.6
12.05
0.377
28.1
11.48
0.438
31.65
14.84
0.456
40.34
19.66
LVDS (Typical Measured Output
Jitter), ps
JRMS (12
kHz to 20
MHz)
Tj (Total
Jitter)
Dj (Deter-
ministic
Jitter)
0.552
41.86
21.4
0.564
35.38
16.01
0.561
74.14
53.51
0.482
42.31
23.33
0.523
58.45
37.84
0.525
87.5
67.35
0.45
66.44
47.49
0.439
69.77
51.2
0.501
69.75
51.87
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