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AM1806_101 Datasheet, PDF (145/243 Pages) Texas Instruments – ARM Microprocessor
AM1806
www.ti.com
SPRS658B – FEBRUARY 2010 – REVISED MAY 2010
Table 6-62. General Timing Requirements for SPI0 Slave Modes (1) (continued)
NO.
PARAMETER
Input Hold Time,
SPI0_SIMO valid
16 tih(SPC_SIMO)S after
receive edge of
SPI0_CLK
Polarity = 0, Phase = 0,
from SPI0_CLK falling
Polarity = 0, Phase = 1,
from SPI0_CLK rising
Polarity = 1, Phase = 0,
from SPI0_CLK rising
Polarity = 1, Phase = 1,
from SPI0_CLK falling
1.3V, 1.2V
MIN MAX
4
4
4
4
1.1V
MIN MAX
4
4
4
4
1.0V
UNIT
MIN MAX
5
5
ns
5
5
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Peripheral Information and Electrical Specifications 145
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