CD74HC4046A Datasheet, PDF(12/28 Page) Texas Instruments – High-Speed CMOS Logic Phase-Locked Loop with VCO

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CD74HC4046A Datasheet, PDF (12/28 Pages) Texas Instruments – High-Speed CMOS Logic Phase-Locked Loop with VCO

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CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A

Switching Speciï¬cations CL = 50pF, Input tr, tf = 6ns (Continued)

PARAMETER

Offset Frequency

DEMODULATOR SECTION

VOUT VS fIN

TEST

SYMBOL CONDITIONS VCC (V) MIN

R2 = 220kâ¦

4.5

C1 = 1nF

R1 =

100kâ¦

=â

4.5

C1 = 100pF

RS = 10kâ¦

R3 = 100kâ¦

C2 = 100pF

25oC

TYP MAX

400 -

330 -

-40oC TO

85oC

MIN MAX

Test Circuits and Waveforms

-55oC TO

125oC

MIN MAX

UNITS

kHz

- mV/kHz

SIGIN COMPIN

INPUTS

tPHL

PCPOUT PC1OUT

PC3OUT OUTPUTS

tTLH

tPHL

tTLH

FIGURE 8. INPUT TO OUTPUT PROPAGATION DELAYS AND

OUTPUT TRANSITION TIMES

SIGIN

INPUTS

COMPIN

INPUTS

tPZH

PC2OUT

OUTPUT

tPZH

90%

tPZL

10%

FIGURE 9. THREE STATE ENABLE AND DISABLE TIMES FOR

PC2OUT

Typical Performance Curves

âVI

SELF-BIAS OPERATING POINT

FIGURE 10. TYPICAL INPUT RESISTANCE CURVE AT SIGIN,

COMPIN

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