CD74HC4046A Datasheet, PDF (11/28 Pages) Texas Instruments – High-Speed CMOS Logic Phase-Locked Loop with VCO

CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A
Switching Specifications C_L = 50pF, Input t_r, t_f = 6ns (Continued)
PARAMETER
Center Frequency
TEST
SYMBOL CONDITIONS V_CC (V) MIN
C₁ = 40pF
3
7
RR₁₂==3_∞kΩ
4.5
12
VCO_IN =
6
14
VCC/2
Frequency Linearity
∆f_VCO
R₁ =
R₂
100kΩ
=∞
C₁ = 100pF
3
4.5
-
-
6
-
Offset Frequency
R₂ = 220kΩ
3
-
C₁ = 1nF
4.5
-
6
-
DEMODULATOR SECTION
V_OUT V_S f_IN
HCT TYPES
R₁ =
R₂
100kΩ
=∞
C₁ = 100pF
3
4.5
-
-
R_S = 10kΩ
6
-
R₃ = 100kΩ
C₂ = 100pF
PHASE COMPARATOR SECTION
Propagation Delay
t_PHL, t_PLH
SIG_IN, COMP_IN to PCI_OUT
C_L = 50pF
4.5
-
SIG_IN, COMP_IN to PCP_OUT t_PHL, t_PLH C_L = 50pF
4.5
-
SIG_IN, COMP_IN to PC3_OUT t_PHL, t_PLH C_L = 50pF
4.5
-
Output Transition Time
t_TLH, t_THL C_L = 50pF
4.5
-
Output Enable Time, SIG_IN, t_PZH, t_PZL C_L = 50pF
4.5
-
COMP_IN to PC2_OUT
Output Disable Time, SIG_IN, t_PHZ, t_PLZ C_L = 50pF
4.5
-
COMP_IN to PCZ_OUT
AC Coupled Input Sensitivity
(_P-P) at SIG_IN or COMP_I
V_I(P-P)
4.5
-
VCO SECTION
Frequency Stability with
Temperature Change
Maximum Frequency
Center Frequency
∆f
∆T
R₁ =
R₂
100kΩ,
=∞
4.5
-
f_MAX
C₁ = 50pF
4.5
-
R₁ =
R₂
3.5kΩ
=∞
C₁ = 0pF
4.5
-
R₁ =
R₂
9.1kΩ
=∞
C₁ = 40pF
4.5
12
RR₁₂==3_∞kΩ
VCO_IN =
VCC/2
Frequency Linearity
∆f_VCO
R₁ =
R₂
100kΩ
=∞
4.5
-
C₁ = 100pF
25^oC
TYP MAX
10
-
17
-
21
-
0.4 -
0.4 -
0.4 -
400 -
400 -
400 -
-
-
330 -
-
-
-
45
-
68
-
58
-
15
-
60
-
68
15
-
0.11 -
24
-
38
-
17
-
0.4 -
-40^oC TO
85^oC
MIN MAX
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
56
-
85
-
73
-
19
-
75
-
85
-
-
-
-
-
-
-
-
-
-
-
-
-55^oC TO
125^oC
MIN MAX
-
-
-
-
-
-
UNITS
MHz
MHz
MHz
-
-
%
-
-
%
-
-
%
-
-
kHz
-
-
kHz
-
-
kHz
-
- mV/kHz
-
- mV/kHz
-
- mV/kHz
-
68
ns
-
102
ns
-
87
ns
-
22
ns
-
90
pF
-
102
pF
-
-
mV
-
-
%/^oC
-
-
MHz
-
-
MHz
-
-
MHz
-
-
%
11