71M6531D Datasheet, PDF (83/115 Pages) Teridian Semiconductor Corporation – Energy Meter IC

FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Name
PLS_INV
PREBOOT
PREG[16:0]
Location
2004[6]
SFRB2[7]
201C[2:0]
201D[7:0]
201E[7:2]
PRE_SAMPS[1:0] 2001[7:6]
QREG[1:0]
RST_SUBSEC
RTCA_ADJ[6:0]
RTC_SEC[5:0
RTC_MIN[5:0]
RTC_HR[4:0]
RTC_DAY[2:0]
RTC_DATE[4:0]
RTC_MO[3:0]
RTC_YR[7:0]
201E[1:0]
2010[0]
2011[6:0]
2015
2016
2017
2018
2019
201A
201B
RTM_E
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
2002[3]
2060[9:8]
2061[7:0]
2062[9:8]
2063[7:0]
2064[9:8]
2064[7:0]
2065[9:8]
2066[7:0]
Reset Wake
0
0
–
–
Dir
R/W
R
Description
Inverts the polarity of the pulse outputs. Normally, these pulses are active low. When
inverted, they become active high.
Indicates that the preboot sequence is active.
4
4 R/W RTC adjust. See Section 1.5.3 Real-Time Clock (RTC) for additional details.
0
0 R/W
0x0FFBF ≤ PREG[16:0] ≤ 0x10040
0
0 R/W _{PREG[16:0] and QREG[1:0] are separate in hardware but can be programmed with a}
single number calculated by the MPU.
0
0 R/W The duration of the pre-summer, in samples.
PRE_SAMPS[1:0] Pre-summer Duration
00
42
01
50
10
84
11
100
0
0 R/W RTC adjust. See Section 1.5.3 Real-Time Clock (RTC) for additional details.
0
0 R/W The sub-second counter is restarted when a 1 is written to this bit.
40
– R/W Analog RTC adjust. See Section 1.5.3 Real-Time Clock (RTC) for additional details.
*
NV _{R/W These are the year, month, day, hour, minute and second parameters of the RTC.}
*
NV
Writing to these registers sets the time. Each write operation to one of these registers
*
NV
must be preceded by a write to 0x201F (WE). Valid values for each parameter are:
*
NV
SEC: 00 to 59, MIN: 00 to 59, HR: 00 to 23 (00 = Midnight)
*
NV
DAY: 01 to 07 (01 = Sunday), DATE: 01 to 31, MO: 01 to 12
*
NV
YR: 00 to 99 (00 and all others divisible by 4 are leap years)
*
NV
Values in the RTC registers are undefined when the IC powers up without a battery but
are maintained through mission and battery modes when a sufficient voltage is main-
tained at the VBAT pin.
* no change of value at reset.
0
0 R/W Real Time Monitor (RTM) enable. When 0, the RTM output is low.
0
0 R/W The four RTM probes. Before each CE code pass, the values of these registers are
0
0
serially output on the RTM pin. The RTM registers are ignored when RTM_E = 0.
0
0
0
0
0
0
0
0
0
0
0
0
v1.2
© 2005-2009 TERIDIAN Semiconductor Corporation
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