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71M6531D Datasheet, PDF (80/115 Pages) Teridian Semiconductor Corporation – Energy Meter IC
Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
Name
Location
LCD_DAC[2:0] 20AB[3:1]
LCD_E
2021[5]
LCD_MODE[2:0] 2021[4:2]
LCD_ONLY
20A9[5]
LCD_SEG0[3:0]
…
LCD_SEG19[3:0]
LCD_SEG24[3:0]
…
LCD_SEG31[3:0]
2030[3:0]
…
2043[3:0]
2048[3:0]
…
204F[3:0]
LCD_SEG32[3:0] 2050[3:0]
Reset Wake Dir
Description
0
L R/W LCD contrast control DAC. Adjusts the LCD voltage in steps of 0.2 V from V3P3SYS
(mission mode) or VBAT (brownout/LCD modes).
LCD_DAC[2:0] Resulting LCD Voltage
000
V3P3 or VBAT
001
V3P3 or VBAT – 0.2V
010
V3P3 or VBAT – 0.4V
011
V3P3 or VBAT – 0.6V
100
V3P3 or VBAT – 0.8V
101
V3P3 or VBAT – 1.0V
110
V3P3 or VBAT – 1.2V
111
V3P3 or VBAT – 1.4V
0
L R/W Enables the LCD display. When disabled, VLC2, VLC1 and VLC0 are ground as are
the COM and SEG outputs.
0
L R/W The LCD bias mode. Use the LCD DAC in ANACTRL to reduce saturation. The num-
ber of states is the number of commons which are driven to multiplex the LCD.
LCD_MODE[2:0] Function
Notes
000
4 states, ⅓ bias ⅓ bias modes can drive 3.3 V LCDs.
001
3 states, ⅓ bias
010
2 states, ½ bias ½ bias and static modes can drive
011
3 states, ½ bias both 3.3 V and 5 V LCDs.
100
static display
0
0
W Puts the part to sleep, but with the LCD display still active. LCD_ONLY is ignored if
system power is present. While in SLEEP mode, the device will wake up on reset,
when the autowake timer times out, when the push button is pushed, or when system
power returns.
0
L R/W LCD Segment Data. Each word contains information for 1 to 4 time divisions of each
…
…
… segment. Some addresses are used to address two segments.
0
L R/W
0
L R/W In each word, bit 0 corresponds to COM0, bit 1 to COM1, bit 2 to COM2 and bit 3 to
…
…
… COM3 of the first segment. Bits 4 through 7 correspond to COM0 to COM3, respec-
0
L
R/W tively, of the second segment.
Care should be taken when writing to LCD_SEG locations since some of them control
0
L R/W DIO pins.
80
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