71M6515H_11 Datasheet, PDF (54/60 Pages) Teridian Semiconductor Corporation – Up to 10ppmC precision ultra-stable voltage reference Digital temperature compensation

71M6515H
A Maxim Integrated Products Brand
Energy Meter IC
DATA SHEET
JULY 2011
Communication between the 71M6515H and the Host Processor
General
To ensure proper transfer of energy and other values from the 71M6515H to the host, the output data of the 71M6515H must
be read by the host each time they are ready, and no energy-related datum can be missed. This requires close synchroniza-
tion between the 71M6515H and the host.
Control Signals
Figure 18 shows the control signals between the 71M6515H and the host processor. These signals are:
1) TX: Serial transmit output pin of the 71M6515H
2) RX: Serial receive input pin of the 71M6515H
3) IRQZ: Interrupt output, used as “Data Ready” hardware signal of the 71M6515H (low-active)
4) RESETZ: Reset input pin of the 71M6515H (low-active, should be pulled up to V3P3)
5) UARTCSZ: UART reset input pin of the 71M6515H (low-active)
6) BAUD_RATE: Baud rate select input pin of the 71M6515H (optional)
7) PULSE_INIT: Pulse polarity select input pin of the 71M6515H (optional)
TX and RX are the most essential signals for the communication between the 71M6515H and the host processor. The IRQZ
pin provides a useful output signal that can be used by the host to determine whether the 71M6515H has fresh data ready.
IRQZ can be connected to either an interrupt input or general I/O input of the host processor.
RESETZ can be used to force a hardware reset of the 71M6515H, and UARTCSZ can be used to reset (purge) the UART of
the 71M6515H communication buffers for reconfiguration. The additional pins BAUD_RATE and PULSE_INIT can be hard-
wired for configuring the communication baud rate and the pulse status, or controlled on power up by the host processor.
71M6515H
Host
TX
RX
IRQZ
RX
TX
IRQ or DIO_1
3.3V
DIO
DIO0...DIO7
RESETZ
UARTCSZ
BAUD_RATE
PULSE_INIT
DIO_2
DIO_3
DIO_4
DIO_5
Figure 18: Connections between 71M6515H and Host
Note that the DIO pins of the host processor used to control the 71M6515H are not lost, since the 71M6515H can provide
eight DIO pins ((DIO0…DIO7) to act as general-purpose DIO pins.
Since the communication between the 71M6515H and its host is based on a binary protocol, it is imperative for the host to
issue a clean character stream without added bytes (UART drivers of high-level operating systems often add extra bytes to the
character stream, relying on error-detecting protocols). In case the 71M6515H loses synchronization due to unexpected bytes
sent by the host, it times out after 10ms (maximum 20ms). The 71M6515H flags a time-out condition by setting the BOOTUP
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