SM59D03G2 Datasheet, PDF (34/67 Pages) SyncMOS Technologies,Inc – 8-Bits Micro-controller

9.1 SFR description
SM59D03G2
8-Bits Micro-controller
8KB+ ISP Flash & 1KB RAM embedded
Mnemonic
ISPC
ISPFAH
ISPFAL
ISPFD
Description
Direct Bit 7
ISP control
register
F7h START
ISP Flash
address high byte
F4h
ISP Flash
address low byte
F5h
ISP Flash data
F6h
Bit 6
-
Bit 5
ISP
-
Bit 4 Bit 3
-
-
ISPFA[15:8]
ISPFA[7:0]
ISPFD[7:0]
Bit 2 Bit 1 Bit 0 RESET
-
ISPF1 ISPF0 00h
00h
00h
00h
Mnemonic: ISPFAH
Address: F4h
7
6
5
4
3
2
1
0 Reset
ISPFA[15:8]
00h
Mnemonic: ISPFAL
Address: F5h
7
6
5
4
3
2
1
0 Reset
ISPFA[7:0]
00h
ISPFA[15:0]: The ISPFAH and ISPFAL provide the 16-bit Flash memory address for the
ISP function. The Flash memory address should not include the ISP
service program space address. If the Flash memory address indicated
by ISPFAH and ISPFAL registers overlaps with the ISP service program
space, the Flash write and page erase function will have no effect.
Mnemonic: ISPFD
Address: F6h
7
6
5
4
3
2
1
0 Reset
ISPFD[7:0]
00h
ISPFD[7:0]: The ISPFD provide the 8-bits data for ISP function.
Mnemonic: ISPC
Address: F7h
7
6
5
4
3
2
1
0 Reset
START
-
-
-
-
-
ISPF[1:0]
00h
ISPF[1:0]: ISP function select.
ISPF[1:0]
ISP function
00
Byte program
01
Chip Protect
10
Page erase( 512 Bytes)
11
Chip erase
START: ISP START bit.
START = 1 : Start ISP function which indicated by ISPF[1:0].
START = 0 : no operation.
The START bit is read-only by default, software must write three specific
values 55h, AAh and 55h sequentially to the ISPFD register to enable the
START bit write attribute. That is:
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M030
34
Ver.C SM59D03G2 07/2009