STCOM Datasheet, PDF (7/58 Pages) STMicroelectronics – Powerline communication and application system-on-chip

STCOM
Description
1.1
Device architecture
The architecture is composed of the following parts:
1. PLC front-end including digital front-end and analog front-end
2. PLC line driver
3. Real-time engine: the digital core running the lower layers of the PLC protocol stack
and implementing modulation and demodulation
4. Protocol engine: the main digital core for running the upper layers of the PLC protocol
stack
5. Wide range of peripherals logically divided into 4 blocks:
– Basic peripherals
– Com1 peripherals
– Com2 peripherals
– Crypto peripherals.
The STCOM detailed architecture is shown in Figure 2.
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