RM0321 Datasheet, PDF(578/584 Page) STMicroelectronics – SPEAr320S address map and registers

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RM0321 Datasheet, PDF (578/584 Pages) STMicroelectronics – SPEAr320S address map and registers

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General purpose timers (GPT)

RM0321

34.2.3

TIMER_COMPARE register

The TIMER_COMPARE is a RW register allows the software to program the timer period.

Table 640. TIMER_COMPARE register bit assignments

Bit

Name

Reset value Description

[15:00] COMPARE_VALUE 16âhFFFF

Compare value.

The COMPARE_VALUE is expressed as an integer number of clock periods (where the

input clock of the timer is the output of the prescaler) ranging from the 16âh0001 minimum

value to the 16âhFFFF maximum value (default, to be intended as free-running timer in auto-

reload mode). When the counter reaches the COMPARE_VALUE, the GPT behaves

depending on the operation mode (auto-reload or single-shot).

Note: 1 In auto-reload mode, when the counter reaches the COMPARE_VALUE, it is cleared and

restarts:

TIMER_PERIOD = (COMPARE_VALUE - 1) x COUNTER_PERIOD + 2 TIMER_CLOCK

periods.

2 COUNTER_PERIOD is the period of the timerâs input clock (i.e. the prescalerâs output).

34.2.4

TIMER_COUNT register

The TIMER_COUNT is a RO register which indicates the current counter value.

Table 641. TIMER_COUNT register bit assignments

Bit

Name

Reset value Description

[15:00] CONT_VALUE 16âh0000 Current counter value.

34.2.5

TIMER_REDG_CAPT register

The TIMER_REDG_CAPT (timer rising edge capture) is a RO register used to store the

current value of the timer counter when a rising edge occurs. When a capture has occurred,

the REDGE bit is set in the TIMER_STATUS_INT_ACK register (Section 34.2.2) and the

corresponding interrupt, if enabled (REDGE_INT bit set to 1âb1 in TIMER_CONTROL

register, Section 34.2.1), is raised.

Table 642. TIMER_REDG_CAPT register bit assignments

Bit

Name

Reset

value

Description

[15:00] COUNT_VALUE_REDGE 16âh0000 Current value of timer when a rising edge occurs

Note:

In the interrupt service routine, the capture register must be read before the next capture

event occurs: if not the current capture value will be overwritten by the next one.

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