RM0321 Datasheet, PDF (336/584 Pages) STMicroelectronics – SPEAr320S address map and registers

Fast infrared port (IRDA)
RM0321
Table 420. IrDA_RIS register bit assignments (continued)
Bit
Name
Reset value Description
[03]
BREQ
BREQ raw interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[02]
LBREQ
LBREQ raw interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[01]
SREQ
SREQ raw interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[00]
LSREQ
LSREQ raw interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
17.2.12
IrDA_MIS register
The IrDA_MIS (masked interrupt status) is a RO register which gives the current masked
status value of the corresponding interrupt (after masking by IrDA_IMSC).
Table 421. IrDA_MIS register bit assignments
Bit
Name
Reset value Description
[31:08] Reserved
-
Read: undefined. Write: should be zero.
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[07]
FD
Frame detected masked interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[06]
FI
Frame invalid masked interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[05]
SD
Signal detected masked interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[04]
FT
Frame transmitted masked interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[03]
BREQ
BREQ masked interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
[02]
LBREQ
LBREQ masked interrupt status.
1’h0
1‘b0 = No interrupt.
1‘b1 = Interrupt pending.
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