ST92F124XX Datasheet, PDF (52/523 Pages) STMicroelectronics – In-Application Programming

Device architecture
ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2
Note:
Working registers
Certain types of instruction require that registers be specified in the form “rx”, where x is in
the range 0 to 15: these are known as Working Registers.
A lower case “r” is used to denote this indirect addressing mode.
Two addressing schemes are available: a single group of 16 working registers, or two
separately mapped groups, each consisting of 8 working registers. These groups may be
mapped starting at any 8- or 16-byte boundary in the register file by means of dedicated
pointer registers. This technique is described in more detail in Section 6.3.3 Register
pointing techniques, and illustrated in Figure 22 and in Figure 23.
System registers
The 16 registers in Group E (R224 to R239) are System registers and may be addressed
using any of the register addressing modes. These registers are described in greater detail
in Section 6.3 System registers.
Paged registers
Up to 64 pages, each containing 16 registers, may be mapped to Group F. These are
addressed using any register addressing mode, in conjunction with the Page Pointer
register, R234, which is one of the System registers. This register selects the page to be
mapped to Group F and, once set, does not need to be changed if two or more registers on
the same page are to be addressed in succession.
Therefore if the Page Pointer, R234, is set to 5, the instructions:
spp #5
ld R242, r4
will load the contents of working register r4 into the third register of page 5 (R242).
These paged registers hold data and control information relating to the on-chip peripherals,
each peripheral always being associated with the same pages and registers to ensure code
compatibility between ST9 devices. The number of these registers therefore depends on the
peripherals which are present in the specific ST9 family device. In other words, pages only
exist if the relevant peripheral is present.
Table 7. Register file organization
Hex.
address
Decimal
address
Function
Register file group
F0-FF
E0-EF
240-255
224-239
Paged
Registers
System
Registers
Group F
Group E
52/523
Doc ID 8848 Rev 7