ST92F124XX Datasheet, PDF (441/523 Pages) STMicroelectronics – In-Application Programming

ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2
On-chip peripherals
Bit 7:0 = DATA[7:0] Data
A data byte of the message. A message can contain from 0 to 8 data bytes.
MAILBOX TIME STAMP LOW REGISTER (MTSLR)
Read / Write
Reset Value: xxxx xxxx (xxh)
7
TIME7
TIME6
TIME5
TIME4
TIME3
TIME2
TIME1
0
TIME0
Bit 7:0 = TIME[7:0] Message Time Stamp Low
This fields contains the low byte of the 16-bit timer value captured at the SOF detection.
MAILBOX TIME STAMP HIGH REGISTER (MTSHR)
Read / Write
Reset Value: xxxx xxxx (xxh)
7
TIME15 TIME14 TIME13
TIME12
TIME11
TIME10
TIME9
0
TIME8
Bit 7:0 = TIME[15:8] Message Time Stamp High
This field contains the high byte of the 16-bit timer value captured at the SOF detection.
Note:
CAN Filter Registers
CAN FILTER CONFIGURATION REG.0 (CFCR0)
All bits of this register are set and cleared by software.
Read / Write
Reset Value: 0000 0000 (00h)
7
FFA1
FSC11 FSC10 FACT1
FFA0
FSC01
FSC00
To modify the FFAx and FSCx bits, the bxCAN must be in INIT mode.
0
FACT0
Bit 7 = FFA1 Filter FIFO Assignment for Filter 1
The message passing through this filter will be stored in the specified FIFO.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
Bit 6:5 = FSC1[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter 1.
Bit 4 = FACT1 Filter Active
The software sets this bit to activate Filter 1. To modify the Filter 1 registers (CF1R[7:0]), the
FACT1 bit must be cleared.
Doc ID 8848 Rev 7
441/523