TDA7580_07 Datasheet, PDF (24/39 Pages) STMicroelectronics – FM/AM digital IF sampling processor

BSPI interface
5
BSPI interface
TDA7580
(T_j =-40°C to 125°C; V_DD =1.7V to 1.9V, V_DD3 = 3.15V to 3.45V) C_load
The values on the table are consistent with a capacitance load on BSPI lines of 160pF)
Figure 12. BSPI timings
SS
MISO
MOSI
SCL
(CPOL=0,CPHA=0)
Valid
t_dtr
t_setup
t_sssetup
t_sclkl
t_hold
t_sclkh
t_sclk
t_sshold t_ssw
Table 19. BSPI timing table
Symbol
Description
Master configured
t_sclk
t_dtr
t_setup
t_hold
t_sclkh
t_sclkl
t_sssetup
t_sshold
t_ssw
Clock cycle
Sclk edge to MOSI valid
MISO setup time
MISO hold time
SCK high time
SCK low time
SS setup time
SS hold time
SS pulse width
Slave configured
t_sclk
t_dtr
t_setup
t_hold
t_sclkh
t_sclkl
t_sssetup
t_sshold
t_ssw
Clock cycle
Sclk edge to MISO valid
MOSI setup time
MOSI hold time
SCK high time
SCK high low
SS setup time
SS hold time
SS pulse width
Min
Typ
Max Unit
184
ns
61
92
ns
52
ns
52
ns
92
ns
92
ns
92
ns
92
ns
184
ns
238
ns
88
119
ns
65
ns
65
ns
119
ns
119
ns
119
ns
119
ns
238
ns
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