TDA7580_07 Datasheet, PDF (12/39 Pages) STMicroelectronics – FM/AM digital IF sampling processor

Block diagram and electrical specifications
TDA7580
Table 5. Pin description (continued)
N°
Name
Type
Description
Notes
After
Reset
37 GPIO_SDO1
38 TST4_SDI0
39 TST1_SDI1
40 GNDH
41 VDDH
42 SDO0
43 SCLK_SCKT
44 LRCK_LRCKT
45 TST2_SCKR
46 TST3_LRCKR
47 VDD
48 GND
49 DBCK0
50 DBIN0
51 DBRQ0
52 DBOUT0
B
DSP0 GPIO for boot selection or audio
SAI0 output.
5V tolerant. DSP0
GPIO3. With internal
pull-up, on at reset [PP]
Input
B
Audio SAI0 data input or test selection pin
in test mode
5V tolerant. DSP0
GPIO5. With internal
pull-up, on at reset [PP]
Input
DSP0 GPIO for boot selection or audio
B SAI1 input. Test selection pin in test
mode.
5V tolerant. DSP0
GPIO4. With internal
pull-up, on at reset [PP]
Input
G
3.3V IO ring power ground (audio SAI,
ResetN, test pins)
P
3.3V IO ring power supply (audio SAI,
ResetN, test pins)
B Radio or audio SAI0 data output
5V tolerant. With
internal pull up, @0V at
reset [PP]
Output
SAI0 receive and transmit bit clock
B (master or slave with ASRC); SAI1
transmit bit clock
5V tolerant
With internal pull up, on
at reset [PP]
Input
SAI0 receive and transmit left/right clock 5V tolerant
B (master or slave with ASRC); SAI1
With internal pull up, on Input
transmit left/right clock
at reset [PP]
SAI0 Transmit bit clock; SAI1 receive and 5V tolerant. DSP0
B transmit bit clock. Or test selection pin in GPIO6. With internal
test mode
pull up, on at reset [PP]
Input
SAI0 Transmit LeftRight clock; SAI1
B Receive and Transmit bit clock. Or Test
selection pin in Test Mode
DSP0 GPIO7. 5V
tolerant. With internal
pull up, on at reset [PP]
Input
P Digital core power supply
1.8V
G Digital core power ground
B Debug port clock of DSP0 (DBCK0)
DSP0 GPIO. 9. 5V
tolerant. With internal
pull down, on at reset
[PP]
Input
DSP0 GPIO. 11. 5V
B
Debug port data input of DSP0 (DBIN0)
tolerant. With internal
pull down, on at reset
[PP]
Input
B Debug port request of DSP0 (DBRQ0)
DSP0 GPIO. 5V tolerant
With internal pull up, on
at reset [PP]
Input
B
Debug port data output of DSP0
(DBOUT0)
DSP0 GPIO10. 5V
tolerant. With internal
pull up, on at reset [PP]
Input
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